From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
We currently fail to reconstruct the bw related cdclk limits
during readout, which triggers a cdclk reclaculation during
fastboot, which is then likely forces a full modeset anyway.
Reconstruct some of the missing state so that we can skip
the cdclk recomputation and thus have a higher chance for
flicker free boot.
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_bw.c | 9 ++++++---
drivers/gpu/drm/i915/display/intel_display.c | 7 +++++--
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 79269d2c476b..30ffec63f9a3 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -627,11 +627,14 @@ void intel_bw_crtc_update(struct intel_bw_state *bw_state,
intel_bw_crtc_data_rate(crtc_state);
bw_state->num_active_planes[crtc->pipe] =
intel_bw_crtc_num_active_planes(crtc_state);
+ bw_state->min_cdclk[crtc->pipe] =
+ intel_bw_crtc_min_cdclk(crtc_state);
- drm_dbg_kms(&i915->drm, "pipe %c data rate %u num active planes %u\n",
- pipe_name(crtc->pipe),
+ drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] data rate %u num active planes %u min cdclk %d kHz\n",
+ crtc->base.base.id, crtc->base.name,
bw_state->data_rate[crtc->pipe],
- bw_state->num_active_planes[crtc->pipe]);
+ bw_state->num_active_planes[crtc->pipe],
+ bw_state->min_cdclk[crtc->pipe]);
}
static unsigned int intel_bw_num_active_planes(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 90bd26431e31..b17b9493c68f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2498,6 +2498,7 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc,
bw_state->data_rate[pipe] = 0;
bw_state->num_active_planes[pipe] = 0;
+ bw_state->min_cdclk[pipe] = 0;
}
/*
@@ -9310,6 +9311,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
to_intel_cdclk_state(dev_priv->cdclk.obj.state);
struct intel_dbuf_state *dbuf_state =
to_intel_dbuf_state(dev_priv->dbuf.obj.state);
+ struct intel_bw_state *bw_state =
+ to_intel_bw_state(dev_priv->bw_obj.state);
enum pipe pipe;
struct intel_crtc *crtc;
struct intel_encoder *encoder;
@@ -9425,8 +9428,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
drm_connector_list_iter_end(&conn_iter);
for_each_intel_crtc(dev, crtc) {
- struct intel_bw_state *bw_state =
- to_intel_bw_state(dev_priv->bw_obj.state);
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct intel_plane *plane;
@@ -9490,6 +9491,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
intel_bw_crtc_update(bw_state, crtc_state);
}
+
+ cdclk_state->bw_min_cdclk = intel_bw_min_cdclk(dev_priv, bw_state);
}
static void
--
2.35.1
