From: Ville Syrj?l? <ville.syrjala at linux.intel.com> BSpec states that the thread override values set by gen7_setup_fixed_func_scheduler() are invalid for HSW. So let's not muck around with them. Since gen7_setup_fixed_func_scheduler() now has two totally independent parts, one for IVB and one for HSW, move the HSW part directly into haswell_init_clock_gating(). Note tht there's another workaround by the name of WaHSWVSRefCountFullforceMissDisable which basically claims that later steppings don't need the fix, but since WaVSRefCountFullforceMissDisable is listed to be needed for all steppings play it safe and keep applying the workaround. Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 4ab8aeb..22cbe68 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4636,7 +4636,7 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv) uint32_t reg = I915_READ(GEN7_FF_THREAD_MODE); /* - * WaVSThreadDispatchOverride:ivb,hsw + * WaVSThreadDispatchOverride:ivb * * This actually overrides the dispatch * mode for all thread types. @@ -4646,10 +4646,6 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv) reg |= GEN7_FF_VS_SCHED_HW; reg |= GEN7_FF_DS_SCHED_HW; - /* WaVSRefCountFullforceMissDisable:hsw */ - if (IS_HASWELL(dev_priv->dev)) - reg &= ~GEN7_FF_VS_REF_CNT_FFME; - I915_WRITE(GEN7_FF_THREAD_MODE, reg); } @@ -4699,7 +4695,9 @@ static void haswell_init_clock_gating(struct drm_device *dev) g4x_disable_trickle_feed(dev); - gen7_setup_fixed_func_scheduler(dev_priv); + /* WaVSRefCountFullforceMissDisable:hsw */ + I915_WRITE(GEN7_FF_THREAD_MODE, + I915_READ(GEN7_FF_THREAD_MODE) & ~GEN7_FF_VS_REF_CNT_FFME); /* WaDisable4x2SubspanOptimization:hsw */ I915_WRITE(CACHE_MODE_1, -- 1.8.1.5
