From: Ville Syrj?l? <ville.syrjala at linux.intel.com> WaDisableTDLUnitClockGating is only relevant for early steppings of VLV. Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 9153e6d..847f6dc 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4847,7 +4847,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev) * This implements the WaDisableRCZUnitClockGating:vlv workaround. */ I915_WRITE(GEN6_UCGCTL2, - GEN7_TDLUNIT_CLOCK_GATE_DISABLE | GEN6_RCZUNIT_CLOCK_GATE_DISABLE); /* WaDisableL3Bank2xClockGate:vlv */ -- 1.8.1.5
