On 2 July 2013 12:03, Chris Wilson <chris at chris-wilson.co.uk> wrote: > On Tue, Jul 02, 2013 at 12:00:48PM -0700, Paul Berry wrote: > > On 28 June 2013 15:39, Chris Wilson <[1]chris at chris-wilson.co.uk> > wrote: > > > > On Fri, Jun 28, 2013 at 03:23:31PM -0700, Ben Widawsky wrote: > > > This series originated from the request from Paul, "can you enable > > page > > > faults"? ?After some though and discussion, we came up with 3 > debug > > features to > > > implement: > > > > The issue lies in that the CS and EU units like to prefetch 128 > bytes > > and will cross page boundaries. Userspace is rather lax in > providing the > > extra page (or preventing the read past the end of its bo) and so > > without adding a sentinel page behind every bo you quickly generate > > false positives. (Unless you also run a fixed userspace). > > > > If you are prepared to fix userspace, tweaking the kernel not to > install > > scratch pages everywhere is trivial. > > > > Mesa already adds the necessary padding to EU programs to ensure that > > prefetch won't cause a page fault, and because of its "stack and heap" > > model for batch buffers, CS prefetching shouldn't cause a page fault > > either.? I don't know whether the 2D drivers do something similar, so > they > > might potentially need fixing. > > You do not on the BLT ring, and have not done historically. The EU is no > longer padded. We have been purposely lax in this area. > -Chris > You're right--I didn't realize that we removed the EU padding, and I wasn't thinking about the BLT code. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20130702/cb34382c/attachment-0001.html>
