On Tue, Jun 25, 2013 at 06:26:40PM +0300, Mika Kuoppala wrote: > The timer for hangchecking can run again before the previous > reset it has triggered has been handled. This can corrupt > the hangcheck state as reset handling will access and write to > the hangcheck data. To prevent this, avoid running the hangcheck > logic while reset is in progress. > > Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com> Patches 1 & 2 are: Reviewed-by: Ben Widawsky <ben at bwidawsk.net> Though I would like a DRM_DEBUG_DRIVER or some such for this case in patch 2. > --- > drivers/gpu/drm/i915/i915_irq.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 3a25a6c..e709a47 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2434,6 +2434,9 @@ void i915_hangcheck_elapsed(unsigned long data) > if (!i915_enable_hangcheck) > return; > > + if (i915_reset_in_progress(&dev_priv->gpu_error)) > + return; > + > for_each_ring(ring, dev_priv, i) { > u32 seqno, acthd; > bool busy = true; > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ben Widawsky, Intel Open Source Technology Center