On Mon, Jun 24, 2013 at 06:29:34PM +0100, Damien Lespiau wrote: > Follow the trend and don't code conditions with platforms but with > features. > > Signed-off-by: Damien Lespiau <damien.lespiau at intel.com> Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_debugfs.c | 2 +- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > drivers/gpu/drm/i915/intel_display.c | 4 ++-- > 3 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 4dcaee3..913f02e 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -1486,7 +1486,7 @@ static int i915_ips_status(struct seq_file *m, void *unused) > struct drm_device *dev = node->minor->dev; > struct drm_i915_private *dev_priv = dev->dev_private; > > - if (!IS_ULT(dev)) { > + if (!HAS_IPS(dev)) { > seq_puts(m, "not supported\n"); > return 0; > } > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 2b8b7ac..92c3bcf 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1481,6 +1481,8 @@ struct drm_i915_file_private { > #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr) > #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc) > > +#define HAS_IPS(dev) (IS_ULT(dev)) > + > #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5) > > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 218bc93..af2b5ab 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3250,7 +3250,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) > /* IPS only exists on ULT machines and is tied to pipe A. */ > static bool hsw_crtc_supports_ips(struct intel_crtc *crtc) > { > - return IS_ULT(crtc->base.dev) && crtc->pipe == PIPE_A; > + return HAS_IPS(crtc->base.dev) && crtc->pipe == PIPE_A; > } > > static void hsw_enable_ips(struct intel_crtc *crtc) > @@ -4069,7 +4069,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc, > pipe_config->pipe_bpp = 8*3; > } > > - if (IS_HASWELL(dev)) > + if (HAS_IPS(dev)) > hsw_compute_ips_config(crtc, pipe_config); > > /* XXX: PCH clock sharing is done in ->mode_set, so make sure the old > -- > 1.8.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch