Report back the user error of attempting to setup a CRTC with an invalid framebuffer pitch. This is trickier than it should be as on gen4, there is a restriction that tiled surfaces must have a stride less than 16k - which is less than the largest supported CRTC size. References: https://bugs.freedesktop.org/show_bug.cgi?id=65099 Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk> --- drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 39e7b1b..cdb768a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1871,6 +1871,7 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_i915_gem_object *obj; int plane = intel_crtc->plane; unsigned long linear_offset; + int pitch_limit; u32 dspcntr; u32 reg; @@ -1886,6 +1887,21 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb, intel_fb = to_intel_framebuffer(fb); obj = intel_fb->obj; + if (IS_VLV(dev)) { + pitch_limit = 32*1024; + } else if (IS_GEN4(dev)) { + if (obj->tiling_mode) + pitch_limit = 16*1024; + else + pitch_limit = 32*1024; + } else + pitch_limit = 8*1024; + + if (fb->pitches[0] > pitch_limit) { + DRM_DEBUG_KMS("Invalid pitch (%d) for scanout\n", fb->pitches[0]); + return -EINVAL; + } + reg = DSPCNTR(plane); dspcntr = I915_READ(reg); /* Mask out pixel format bits in case we change it */ @@ -1983,6 +1999,11 @@ static int ironlake_update_plane(struct drm_crtc *crtc, return -EINVAL; } + if (fb->pitches[0] > 32*1024) { + DRM_DEBUG_KMS("Invalid pitch (%d) for scanout\n", fb->pitches[0]); + return -EINVAL; + } + intel_fb = to_intel_framebuffer(fb); obj = intel_fb->obj; -- 1.8.3.1
