On Wed, Jun 12, 2013 at 07:18:38PM +0200, Daniel Vetter wrote: > On Wed, Jun 12, 2013 at 10:13:41AM -0700, Ben Widawsky wrote: > > On Wed, Jun 12, 2013 at 01:37:21PM +0200, Daniel Vetter wrote: > > > The code to handle it is broken - there's simply no code to clear CS > > > parser errors on gen5+. And behold, for all the other rings we also > > > don't enable it! > > > > > > Leave the handling code itself in place just to be consistent with the > > > existing mess though. And in case someone feels like fixing it all up. > > > > > > This has been errornously enabled in > > > > > > commit 12638c57f31952127c734c26315e1348fa1334c2 > > > Author: Ben Widawsky <ben at bwidawsk.net> > > > Date: Tue May 28 19:22:31 2013 -0700 > > > > > > drm/i915: Enable vebox interrupts > > > > > > Cc: Damien Lespiau <damien.lespiau at intel.com> > > > Cc: Ben Widawsky <ben at bwidawsk.net> > > > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch> > > > > > Why not fix the problem instead of just disabling the interrupt? Then > > the "existing mess" is justified. It really shouldn't be terribly > > difficult to fix it. > > Haven't seen it proven useful, and I don't want to blow through time just > for fun on it. Hangcheck seems to be able to deal with it just fine. > -Daniel I don't get it. Isn't it just clearing a bit in the handler, vs. clearing the flag here? > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ben Widawsky, Intel Open Source Technology Center
