On Wed, Jun 05, 2013 at 01:34:24PM +0200, Daniel Vetter wrote:
> Just yet another prep step to be able to do all this up-front, before
> we've set up any of the shared dplls in the new state. This will
> eventually be useful for atomic modesetting.
>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>
--
Damien
> ---
> drivers/gpu/drm/i915/intel_display.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 334f86a..4d2284e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2999,7 +2999,7 @@ static void intel_put_shared_dpll(struct intel_crtc *crtc)
> crtc->config.shared_dpll = DPLL_ID_NONE;
> }
>
> -static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc, u32 dpll, u32 fp)
> +static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc)
> {
> struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
> struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
> @@ -3029,8 +3029,8 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
> if (pll->refcount == 0)
> continue;
>
> - if (dpll == (I915_READ(PCH_DPLL(pll->id)) & 0x7fffffff) &&
> - fp == I915_READ(PCH_FP0(pll->id))) {
> + if (memcmp(&crtc->config.dpll_hw_state, &pll->hw_state,
> + sizeof(pll->hw_state)) == 0) {
> DRM_DEBUG_KMS("CRTC:%d sharing existing %s (refcount %d, ative %d)\n",
> crtc->base.base.id,
> pll->name, pll->refcount, pll->active);
> @@ -5660,7 +5660,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
> else
> intel_crtc->config.dpll_hw_state.fp1 = fp;
>
> - pll = intel_get_shared_dpll(intel_crtc, dpll, fp);
> + pll = intel_get_shared_dpll(intel_crtc);
> if (pll == NULL) {
> DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
> pipe_name(pipe));
> --
> 1.7.11.7
>
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