2013/6/7 Damien Lespiau <damien.lespiau at intel.com>: > Let's disable RC6+ by default. We still leave the possibility to > override this with the module parameter. > > I've also shuffled the code around so we always log if we have RC6 > enabled or disabled. Why disable RC6+ on IVB? My docs tells me it should only be disabled on the very first pre-production machines that no one has. On the other hand, it looks like that for VLV we should disable RC6+. The "code shuffle" looks like a nice improvement. > > Signed-off-by: Damien Lespiau <damien.lespiau at intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 25 +++++++++---------------- > 1 file changed, 9 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 0465cd6..e19952f 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3158,27 +3158,20 @@ int intel_enable_rc6(const struct drm_device *dev) > if (INTEL_INFO(dev)->gen < 5) > return 0; > > - /* Respect the kernel parameter if it is set */ > - if (i915_enable_rc6 >= 0) > - return i915_enable_rc6; > - > /* Disable RC6 on Ironlake */ > - if (INTEL_INFO(dev)->gen == 5) > + if (i915_enable_rc6 == 0 || INTEL_INFO(dev)->gen == 5) { > + DRM_DEBUG_DRIVER("RC6 disabled\n"); > return 0; > - > - if (IS_HASWELL(dev)) { > - DRM_DEBUG_DRIVER("Haswell: only RC6 available\n"); > - return INTEL_RC6_ENABLE; > } > > - /* snb/ivb have more than one rc6 state. */ > - if (INTEL_INFO(dev)->gen == 6) { > - DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n"); > - return INTEL_RC6_ENABLE; > - } > + DRM_DEBUG_DRIVER("RC6 enabled\n"); > + > + if (i915_enable_rc6 > 0) > + return i915_enable_rc6; > > - DRM_DEBUG_DRIVER("RC6 and deep RC6 enabled\n"); > - return (INTEL_RC6_ENABLE | INTEL_RC6p_ENABLE); > + /* snb/ivb have more than one rc6 state. However we only allow RC6 > + * WaRsDisableRC6Plus:snb,ivb,vlv */ > + return INTEL_RC6_ENABLE; > } > > static void gen6_enable_rps(struct drm_device *dev) > -- > 1.8.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni