2013/6/7 Damien Lespiau <damien.lespiau at intel.com>: > Signed-off-by: Damien Lespiau <damien.lespiau at intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com> If you search for the WaFbcDisableDpfcClockGating string on that file, you'll see that this workaround is implemented differently on IVB/HSW: on ILK the bits are turned on at init_clock_gating and stay like that. On IVB/HSW we enable the bits at gen7_enable_fbc and disable them at ironlake_disable_fbc. Can't se convert these ILK/SNB FBC workarounds to be implemented like IVB/HSW? Of course, this would be a separate patch. And we would have to re-check all the workarounds that only need to be enabled while FBC is enabled. Volunteers? > --- > drivers/gpu/drm/i915/intel_pm.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index eb3c2c4..2eb1846 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4385,7 +4385,10 @@ static void ironlake_init_clock_gating(struct drm_device *dev) > struct drm_i915_private *dev_priv = dev->dev_private; > uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE; > > - /* Required for FBC */ > + /* > + * Required for FBC > + * WaFbcDisableDpfcClockGating:ilk > + */ > dspclk_gate |= ILK_DPFCRUNIT_CLOCK_GATE_DISABLE | > ILK_DPFCUNIT_CLOCK_GATE_DISABLE | > ILK_DPFDUNIT_CLOCK_GATE_ENABLE; > -- > 1.8.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni
