Before I start to make a complete mess out of this, crank up
the paranoia level a bit.
v2: Kill the has_pch_encoder check in put_shared_dpll - it's invalid
as spotted by Ville since we currently only put the dpll when we
already have the new pipe config. So a direct pch port -> cpu edp
transition will hit this.
v3: Now that I've lifted my blinders add the WARN_ON Ville requested.
Cc: Ville Syrj?l? <ville.syrjala at linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
drivers/gpu/drm/i915/intel_display.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8fbcf31..4d50b0a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1414,6 +1414,7 @@ static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc)
assert_pch_pll_enabled(dev_priv, pll, NULL);
return;
}
+ WARN_ON(pll->on);
DRM_DEBUG_KMS("enabling PCH PLL %x\n", pll->pll_reg);
@@ -1452,6 +1453,7 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
}
assert_pch_pll_enabled(dev_priv, pll, NULL);
+ WARN_ON(!pll->on);
if (--pll->active)
return;
@@ -3051,7 +3053,11 @@ static void intel_put_pch_pll(struct intel_crtc *intel_crtc)
return;
}
- --pll->refcount;
+ if (--pll->refcount == 0) {
+ WARN_ON(pll->on);
+ WARN_ON(pll->active);
+ }
+
intel_crtc->pch_pll = NULL;
}
--
1.7.11.7
