Move struct intel_shared_dpll_funcs to intel_dpll_mgr.c, as no other
place needs to have access to it. We also don't need to have kernel-doc
documentation for file internal structures, so drop them while at it.
Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 35 ++++++++++++++
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 46 +------------------
2 files changed, 36 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 3f7357123a6d..6723c3de5a80 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -50,6 +50,41 @@
* commit phase.
*/
+/* platform specific hooks for managing DPLLs */
+struct intel_shared_dpll_funcs {
+ /*
+ * Hook for enabling the pll, called from intel_enable_shared_dpll() if
+ * the pll is not already enabled.
+ */
+ void (*enable)(struct drm_i915_private *i915,
+ struct intel_shared_dpll *pll);
+
+ /*
+ * Hook for disabling the pll, called from intel_disable_shared_dpll()
+ * only when it is safe to disable the pll, i.e., there are no more
+ * tracked users for it.
+ */
+ void (*disable)(struct drm_i915_private *i915,
+ struct intel_shared_dpll *pll);
+
+ /*
+ * Hook for reading the values currently programmed to the DPLL
+ * registers. This is used for initial hw state readout and state
+ * verification after a mode set.
+ */
+ bool (*get_hw_state)(struct drm_i915_private *i915,
+ struct intel_shared_dpll *pll,
+ struct intel_dpll_hw_state *hw_state);
+
+ /*
+ * Hook for calculating the pll's output frequency based on its passed
+ * in state.
+ */
+ int (*get_freq)(struct drm_i915_private *i915,
+ const struct intel_shared_dpll *pll,
+ const struct intel_dpll_hw_state *pll_state);
+};
+
struct intel_dpll_mgr {
const struct dpll_info *dpll_info;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index ef2889753807..91fe181462b2 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -44,6 +44,7 @@ struct intel_crtc;
struct intel_crtc_state;
struct intel_encoder;
struct intel_shared_dpll;
+struct intel_shared_dpll_funcs;
/**
* enum intel_dpll_id - possible DPLL ids
@@ -251,51 +252,6 @@ struct intel_shared_dpll_state {
struct intel_dpll_hw_state hw_state;
};
-/**
- * struct intel_shared_dpll_funcs - platform specific hooks for managing DPLLs
- */
-struct intel_shared_dpll_funcs {
- /**
- * @enable:
- *
- * Hook for enabling the pll, called from intel_enable_shared_dpll()
- * if the pll is not already enabled.
- */
- void (*enable)(struct drm_i915_private *dev_priv,
- struct intel_shared_dpll *pll);
-
- /**
- * @disable:
- *
- * Hook for disabling the pll, called from intel_disable_shared_dpll()
- * only when it is safe to disable the pll, i.e., there are no more
- * tracked users for it.
- */
- void (*disable)(struct drm_i915_private *dev_priv,
- struct intel_shared_dpll *pll);
-
- /**
- * @get_hw_state:
- *
- * Hook for reading the values currently programmed to the DPLL
- * registers. This is used for initial hw state readout and state
- * verification after a mode set.
- */
- bool (*get_hw_state)(struct drm_i915_private *dev_priv,
- struct intel_shared_dpll *pll,
- struct intel_dpll_hw_state *hw_state);
-
- /**
- * @get_freq:
- *
- * Hook for calculating the pll's output frequency based on its
- * passed in state.
- */
- int (*get_freq)(struct drm_i915_private *i915,
- const struct intel_shared_dpll *pll,
- const struct intel_dpll_hw_state *pll_state);
-};
-
/**
* struct dpll_info - display PLL platform specific info
*/
--
2.30.2
