On Wed, Jun 05, 2013 at 10:46:41AM +0300, Jani Nikula wrote: > On Tue, 21 May 2013, ville.syrjala at linux.intel.com wrote: > > From: Ville Syrj?l? <ville.syrjala at linux.intel.com> > > > > Fix the DSPCLK_GATE_D access for VLV. The code incorrectly tried to > > poke at the ILK+ version of the register which is at the wrong offset. > > Reviewed-by: Jani Nikula <jani.nikula at intel.com> Both merged, thanks. -Daniel > > > Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 2 +- > > drivers/gpu/drm/i915/intel_pm.c | 2 +- > > 2 files changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index 55caedb..4e8aabd 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -1208,7 +1208,7 @@ > > #define DSTATE_PLL_D3_OFF (1<<3) > > #define DSTATE_GFX_CLOCK_GATING (1<<1) > > #define DSTATE_DOT_CLOCK_GATING (1<<0) > > -#define DSPCLK_GATE_D 0x6200 > > +#define DSPCLK_GATE_D (dev_priv->info->display_mmio_offset + 0x6200) > > # define DPUNIT_B_CLOCK_GATE_DISABLE (1 << 30) /* 965 */ > > # define VSUNIT_CLOCK_GATE_DISABLE (1 << 29) /* 965 */ > > # define VRHUNIT_CLOCK_GATE_DISABLE (1 << 28) /* 965 */ > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index a1a931c..4c8ce90 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -4284,7 +4284,7 @@ static void valleyview_init_clock_gating(struct drm_device *dev) > > struct drm_i915_private *dev_priv = dev->dev_private; > > int pipe; > > > > - I915_WRITE(ILK_DSPCLK_GATE_D, ILK_VRHUNIT_CLOCK_GATE_DISABLE); > > + I915_WRITE(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE); > > > > /* WaDisableEarlyCull:vlv */ > > I915_WRITE(_3D_CHICKEN3, > > -- > > 1.8.1.5 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx at lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Jani Nikula, Intel Open Source Technology Center > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
