This series is to introduce new macros generic to i915 for checking 0 and 1 bits, instead on relying on whats defined by the mmu, since it could be different or non-exisitent between different platforms. v2: Corrected sender's email. v3: Corrected spelling error. v4: Clean up a few other macros that are checking 0 and 1 bits. Thanks to Lucas De Marchi for suggesting these cleanups. Michael Cheng (3): drm/i915: Introduce new macros for i915 PTE drm/i915: Clean up GEN6 page valid macros drm/i915: Clean up BYT_PTE_WRITEABLE drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 2 +- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 6 +++--- drivers/gpu/drm/i915/gt/intel_ggtt.c | 14 +++++++------- drivers/gpu/drm/i915/gt/intel_gtt.h | 6 +++--- drivers/gpu/drm/i915/gvt/gtt.c | 12 ++++++------ 5 files changed, 20 insertions(+), 20 deletions(-) -- 2.25.1
