On Wed, 8 May 2013 12:50:23 +0300 ville.syrjala at linux.intel.com wrote: > From: Ville Syrj?l? <ville.syrjala at linux.intel.com> > > Loading the palette after the planes are enabled can risk showing > incorrect colors. ILK+ already load the palette before even the pipe > is enabled. Just follow the same order for gen2-4 and VLV. > > Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index b0e29e2..40e014af 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3683,10 +3683,11 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) > /* Enable panel fitting for eDP */ > i9xx_pfit_enable(intel_crtc); > > + intel_crtc_load_lut(crtc); > + > intel_enable_pipe(dev_priv, pipe, false); > intel_enable_plane(dev_priv, plane, pipe); > > - intel_crtc_load_lut(crtc); > intel_update_fbc(dev); > > /* Give the overlay scaler a chance to enable if it's on this pipe */ > @@ -3722,12 +3723,13 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) > /* Enable panel fitting for LVDS */ > i9xx_pfit_enable(intel_crtc); > > + intel_crtc_load_lut(crtc); > + > intel_enable_pipe(dev_priv, pipe, false); > intel_enable_plane(dev_priv, plane, pipe); > if (IS_G4X(dev)) > g4x_fixup_plane(dev_priv, pipe); > > - intel_crtc_load_lut(crtc); > intel_update_fbc(dev); > > /* Give the overlay scaler a chance to enable if it's on this pipe */ So it's just the pll that we need to have running in this case, not the pipe? I guess we'd find out quickly enough, the failure mode is a hard system hang... -- Jesse Barnes, Intel Open Source Technology Center
