From: Ville Syrj?l? <ville.syrjala at linux.intel.com>
Supposedly VLV can report when the display engine didn't claim a
register access. Try to hook it up to I915_WRITE().
Totally untested as of now.
Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com>
---
Found this sitting on a branch in my machine. I quickly wrote it a while
back as I was trawling the docs. I never got around to testing it. Maybe
someone else has the interest to try it out...
drivers/gpu/drm/i915/i915_drv.c | 23 +++++++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 5 +++++
2 files changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 624cdfc..43192a6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1225,6 +1225,27 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
}
}
+static void
+vlv_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
+{
+ if (IS_VALLEYVIEW(dev_priv->dev) &&
+ I915_READ_NOTRACE(CLAIM_ER) & (CTR_OVERFLOW | CLAIM_ER_CTR)) {
+ DRM_ERROR("Unknown unclaimed register before writing to %x\n",
+ reg);
+ I915_WRITE_NOTRACE(CLAIM_ER, CLAIM_ER_CLR);
+ }
+}
+
+static void
+vlv_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
+{
+ if (IS_VALLEYVIEW(dev_priv->dev) &&
+ I915_READ_NOTRACE(CLAIM_ER) & (CTR_OVERFLOW | CLAIM_ER_CTR)) {
+ DRM_ERROR("Unclaimed write to %x\n", reg);
+ I915_WRITE_NOTRACE(CLAIM_ER, CLAIM_ER_CLR);
+ }
+}
+
#define __i915_read(x, y) \
u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
u##x val = 0; \
@@ -1262,11 +1283,13 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
if (IS_GEN5(dev_priv->dev)) \
ilk_dummy_write(dev_priv); \
hsw_unclaimed_reg_clear(dev_priv, reg); \
+ vlv_unclaimed_reg_clear(dev_priv, reg); \
write##y(val, dev_priv->regs + reg); \
if (unlikely(__fifo_ret)) { \
gen6_gt_check_fifodbg(dev_priv); \
} \
hsw_unclaimed_reg_check(dev_priv, reg); \
+ vlv_unclaimed_reg_check(dev_priv, reg); \
}
__i915_write(8, b)
__i915_write(16, w)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index dca3504..9d05675 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -651,6 +651,11 @@
#define DERRMR 0x44050
+#define CLAIM_ER (VLV_DISPLAY_BASE + 0x2028)
+#define CLAIM_ER_CLR (1 << 31)
+#define CTR_OVERFLOW (1 << 16)
+#define CLAIM_ER_CTR 0xffff
+
/* GM45+ chicken bits -- debug workaround bits that may be required
* for various sorts of correct behavior. The top 16 bits of each are
* the enables for writing to the corresponding low bit.
--
1.8.1.5
