On Wed, May 01, 2013 at 11:03:10AM -0700, Ben Widawsky wrote: > On Wed, May 01, 2013 at 11:00:34AM -0700, Ben Widawsky wrote: > > This reverts commit 03752f5b7b77b95d83479885040950fba1250850. > > > > This revert requires a bit of explanation on how I understand things > > work. Internally the architects/designers decide how the stolen encoding > > works. We put it in a doc. BIOS writers take these docs and implement > > it. Driver writers read the doc too, and read the value left by the BIOS > > writers, and then we make magic. > > > > The failing here is that in the docs we had[1] contained two different > > definitions for this register for Gen7. (We have both a PCI register, > > and an MMIO, and each of these were different). At the time [2] of > > 03752f5, we asked the architects what the correct value should be; but > > that doesn't match the reality (BIOS) unfortunately. > > > > So on all machines I can get my hands on, this revert is the right thing > > to do. I've also worked with the product group to confirm that they > > agree this revert is what we should do. People using HW made my "people" > > who both write their own BIOS, and have access to our docs (Apple?) > > Ooops, left this bit out... These "people" may not agree with the > revert. I don't have machines to test. > > > > > [1] The docs are still wrong on this one. Now instead of two registers with > > two definitions, we have one register with BOTH definitions, progress? > > [2] The open source PRMs have the "wrong" definitions in chapter Volume > > 1 part6, section 1.1.12. > > > > This digging was inspired by Paulo. > > > > Conflicts: > > drivers/gpu/drm/i915/i915_gem_gtt.c > > > > Cc: Paulo Zanoni <przanoni at gmail.com> > > Signed-off-by: Ben Widawsky <ben at bwidawsk.net> Picked up for -fixes, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
