On Tue, Apr 30, 2013 at 04:53:41PM +0300, Mika Kuoppala wrote:
> Daniel Vetter <daniel.vetter at ffwll.ch> writes:
>
> Patches 1,2 and 3:
>
> Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>
All merged to dinq, thanks for the review.
-Daniel
>
> > Writing hw registers from compute_config?
> > Just say no!
> >
> > In this case not too horrible since we write a constant 0, and only
> > debugging would put something else in there. But while checking that
> > code I've noticed that this register disappeared on pch platforms, so
> > fix that up, too.
> >
> > And adjust the comment a bit, it's outdated.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 4 ++++
> > drivers/gpu/drm/i915/intel_lvds.c | 10 ----------
> > 2 files changed, 4 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 2259cdd..26ff7d6 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -3633,6 +3633,10 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
> >
> > I915_WRITE(PFIT_PGM_RATIOS, pipe_config->gmch_pfit.pgm_ratios);
> > I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control);
> > +
> > + /* Border color in case we don't scale up to the full screen. Black by
> > + * default, change to something else for debugging. */
> > + I915_WRITE(BCLRPAT(crtc->pipe), 0);
> > }
> >
> > static void valleyview_crtc_enable(struct drm_crtc *crtc)
> > diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> > index 47f47ea..d256fe4 100644
> > --- a/drivers/gpu/drm/i915/intel_lvds.c
> > +++ b/drivers/gpu/drm/i915/intel_lvds.c
> > @@ -231,7 +231,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
> > struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
> > struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
> > unsigned int lvds_bpp;
> > - int pipe;
> >
> > /* Should never happen!! */
> > if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
> > @@ -274,15 +273,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
> > intel_connector->panel.fitting_mode);
> > }
> >
> > - /*
> > - * Enable automatic panel scaling for non-native modes so that they fill
> > - * the screen. Should be enabled before the pipe is enabled, according
> > - * to register description and PRM.
> > - * Change the value here to see the borders for debugging
> > - */
> > - for_each_pipe(pipe)
> > - I915_WRITE(BCLRPAT(pipe), 0);
> > -
> > drm_mode_set_crtcinfo(adjusted_mode, 0);
> > pipe_config->timings_set = true;
> >
> > --
> > 1.7.11.7
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
