Hi all, this series enable Frame Buffer Compression at IVB and HSW. I decided to create a new function gen7_enable_fbc to avoid getting old function messed with many IS_IVYBRIDGE and IS_HASWELL checks. Also I decided to split the needed workarounds in separated patches to be easy to revert at any time if needed. On my local tests using a HSW ULT machine I could save around 0.1/0.2W. Up to 0.3W. And apparently stable enough. Zhang, Ouping <ouping.zhang at intel.com> confirmed "FBC saved more 0.3w on idle, 0.2w on video and 0.2w on game workload" on HSW. We decided to leave it disabled by default on IVB for now before a careful validation in order to avoid issues we faced with SNB previously. On HSW it is enabled by default. Chris Wilson required more interection with user space and Daniel Vetter has already giving some suggestions. This work still need to be done, but first lets enable fbc support using the current structure. As always, reviews, comments, bikeshedings, tests, etc are welcome. Thanks in advance, Rodrigo. Rodrigo Vivi (6): drm/i915: Enable FBC at Ivybridge. drm/i915: IVB FBC WaFbcAsynchFlipDisableFbcQueue drm/i915: IVB FBC WaFbcDisableDpfcClockGating drm/i915: Enable FBC at Haswell. drm/i915: HSW FBC WaFbcAsynchFlipDisableFbcQueue drm/i915: HSW FBC WaFbcDisableDpfcClockGating drivers/gpu/drm/i915/i915_drv.c | 2 ++ drivers/gpu/drm/i915/i915_reg.h | 16 +++++++++++ drivers/gpu/drm/i915/intel_pm.c | 61 +++++++++++++++++++++++++++++++++++++++-- 3 files changed, 76 insertions(+), 3 deletions(-) -- 1.8.1.4
