On Thu, Apr 18, 2013 at 11:29:17PM +0300, Imre Deak wrote: > On Fri, 2013-04-12 at 17:57 -0300, Paulo Zanoni wrote: > > +static void cpt_set_fifo_underrun_reporting(struct drm_device *dev, > > + enum transcoder pch_transcoder, > > + bool enable) > > +{ > > + struct drm_i915_private *dev_priv = dev->dev_private; > > + > > + if (enable) { > > + if (!cpt_can_enable_serr_int(dev)) > > + return; > > + > > + I915_WRITE(SERR_INT, SERR_INT_TRANS_A_FIFO_UNDERRUN | > > + SERR_INT_TRANS_B_FIFO_UNDERRUN | > > + SERR_INT_TRANS_C_FIFO_UNDERRUN); > > We end up here for LPT too, but there only the TRANS_A bit is defined. We have the same issue on cpt where there's not really a pipe C on the pch. I guess it doesn't really matter. > Otherwise looks good: > Reviewed-by: Imre Deak <imre.deak at intel.com> Queued for -next, thanks for the patch and review. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch