On Wed, Apr 17, 2013 at 01:40:56PM -0700, Jesse Barnes wrote:
> On Wed, 17 Apr 2013 20:01:39 +0200
> Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
>
> > Oops.
> >
> > This regression has been introduced in
> >
> > commit 5d2d38ddcac991f71c19d03d95bde8e14abc0352
> > Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> > Date: Wed Mar 27 00:45:01 2013 +0100
> >
> > drm/i915: clean up pipe bpp confusion
> >
> > Reported-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 85acef5..47104e0 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -4006,9 +4006,9 @@ static int intel_crtc_compute_config(struct drm_crtc *crtc,
> > adjusted_mode->hsync_start == adjusted_mode->hdisplay)
> > return -EINVAL;
> >
> > - if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) && pipe_config->pipe_bpp > 10) {
> > + if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) && pipe_config->pipe_bpp > 10*3) {
> > pipe_config->pipe_bpp = 10*3; /* 12bpc is gen5+ */
> > - } else if (INTEL_INFO(dev)->gen <= 4 && pipe_config->pipe_bpp > 8) {
> > + } else if (INTEL_INFO(dev)->gen <= 4 && pipe_config->pipe_bpp > 8*3) {
> > /* only a 8bpc pipe, with 6bpc dither through the panel fitter
> > * for lvds. */
> > pipe_config->pipe_bpp = 8*3;
>
> Yep, looks good. Thanks.
>
> Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org> (the first part is
> t-b me too).
Picked up for -fixes, thanks for the review.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
