== Series Details == Series: drm/i915: Introduce Intel PXP URL : https://patchwork.freedesktop.org/series/90503/ State : warning == Summary == $ dim checkpatch origin/drm-tip ef325598b78f drm/i915/pxp: Define PXP component interface -:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #31: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 52 lines checked 85662cad4815 mei: pxp: export pavp client to me client bus -:33: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #33: new file mode 100644 -:161: WARNING:TRACING_LOGGING: Unnecessary ftrace-like logging - prefer using ftrace #161: FILE: drivers/misc/mei/pxp/mei_pxp.c:92: + dev_dbg(dev, "%s\n", __func__); -:176: WARNING:TRACING_LOGGING: Unnecessary ftrace-like logging - prefer using ftrace #176: FILE: drivers/misc/mei/pxp/mei_pxp.c:107: + dev_dbg(dev, "%s\n", __func__); total: 0 errors, 3 warnings, 0 checks, 280 lines checked 2dc2268deb12 drm/i915/pxp: define PXP device flag and kconfig -:46: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #46: FILE: drivers/gpu/drm/i915/i915_drv.h:1704: +#define HAS_PXP(dev_priv) (IS_ENABLED(CONFIG_DRM_I915_PXP) && \ + INTEL_INFO(dev_priv)->has_pxp) && \ + VDBOX_MASK(&dev_priv->gt) -:46: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects? #46: FILE: drivers/gpu/drm/i915/i915_drv.h:1704: +#define HAS_PXP(dev_priv) (IS_ENABLED(CONFIG_DRM_I915_PXP) && \ + INTEL_INFO(dev_priv)->has_pxp) && \ + VDBOX_MASK(&dev_priv->gt) total: 1 errors, 0 warnings, 1 checks, 34 lines checked 2b998e8ec953 drm/i915/gt: Export the pinned context constructor and destructor 8a76c2a85287 drm/i915/pxp: allocate a vcs context for pxp usage -:97: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #97: new file mode 100644 -:121: ERROR:TRAILING_STATEMENTS: trailing statements should be on next line #121: FILE: drivers/gpu/drm/i915/pxp/intel_pxp.c:20: + for (engine = gt->engine_class[VIDEO_DECODE_CLASS][0]; !engine; engine++); total: 1 errors, 1 warnings, 0 checks, 168 lines checked 6bd0c1203dc5 drm/i915/pxp: Implement funcs to create the TEE channel -:72: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #72: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 152 lines checked d9c097841a73 drm/i915/pxp: set KCR reg init 7161fc685bdf drm/i915/pxp: Create the arbitrary session after boot -:87: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #87: new file mode 100644 -:344: CHECK:LINE_SPACING: Please don't use multiple blank lines #344: FILE: drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h:36: + + total: 0 errors, 1 warnings, 1 checks, 300 lines checked cb24d6a2574a drm/i915/pxp: Implement arb session teardown -:63: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #63: FILE: drivers/gpu/drm/i915/gt/intel_gpu_commands.h:151: +#define MI_FLUSH_DW_PROTECTED_MEM_EN (1<<22) ^ -:117: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #117: new file mode 100644 -:139: ERROR:CODE_INDENT: code indent should use tabs where possible #139: FILE: drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c:18: +^I MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG)$ total: 1 errors, 1 warnings, 1 checks, 282 lines checked 4b5b3318d941 drm/i915/pxp: Implement PXP irq handler -:209: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #209: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 420 lines checked 33fe09ce5d32 drm/i915/pxp: interface for marking contexts as using protected content a3dfaa44f65f drm/i915/pxp: start the arb session on demand bec1d65ea26a drm/i915/pxp: Enable PXP power management -:137: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #137: new file mode 100644 -:205: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #205: FILE: drivers/gpu/drm/i915/pxp/intel_pxp_pm.h:18: +} +static inline void intel_pxp_resume(struct intel_pxp *pxp) total: 0 errors, 1 warnings, 1 checks, 247 lines checked 6385a5aed210 drm/i915/pxp: User interface for Protected buffer -:87: CHECK:LINE_SPACING: Please don't use multiple blank lines #87: FILE: drivers/gpu/drm/i915/gem/i915_gem_create.c:371: + + -:301: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #301: FILE: drivers/gpu/drm/i915/pxp/intel_pxp.h:60: +} +static inline void intel_pxp_object_remove(struct drm_i915_gem_object *obj) total: 0 errors, 0 warnings, 2 checks, 295 lines checked 45bde6c5331e drm/i915/pxp: Add plane decryption support 987b3307a598 drm/i915/pxp: black pixels on pxp disabled -:164: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects? #164: FILE: drivers/gpu/drm/i915/i915_reg.h:11293: +#define PLANE_CSC_COEFF(pipe, plane, index) _MMIO_PLANE(plane, \ + _PLANE_CSC_RY_GY_1(pipe) + (index) * 4, \ + _PLANE_CSC_RY_GY_2(pipe) + (index) * 4) -:164: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'index' - possible side-effects? #164: FILE: drivers/gpu/drm/i915/i915_reg.h:11293: +#define PLANE_CSC_COEFF(pipe, plane, index) _MMIO_PLANE(plane, \ + _PLANE_CSC_RY_GY_1(pipe) + (index) * 4, \ + _PLANE_CSC_RY_GY_2(pipe) + (index) * 4) -:165: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #165: FILE: drivers/gpu/drm/i915/i915_reg.h:11294: + _PLANE_CSC_RY_GY_1(pipe) + (index) * 4, \ -:178: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects? #178: FILE: drivers/gpu/drm/i915/i915_reg.h:11307: +#define PLANE_CSC_PREOFF(pipe, plane, index) _MMIO_PLANE(plane, _PLANE_CSC_PREOFF_HI_1(pipe) + \ + (index) * 4, _PLANE_CSC_PREOFF_HI_2(pipe) + \ + (index) * 4) -:178: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'index' - possible side-effects? #178: FILE: drivers/gpu/drm/i915/i915_reg.h:11307: +#define PLANE_CSC_PREOFF(pipe, plane, index) _MMIO_PLANE(plane, _PLANE_CSC_PREOFF_HI_1(pipe) + \ + (index) * 4, _PLANE_CSC_PREOFF_HI_2(pipe) + \ + (index) * 4) -:179: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #179: FILE: drivers/gpu/drm/i915/i915_reg.h:11308: + (index) * 4, _PLANE_CSC_PREOFF_HI_2(pipe) + \ -:192: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects? #192: FILE: drivers/gpu/drm/i915/i915_reg.h:11321: +#define PLANE_CSC_POSTOFF(pipe, plane, index) _MMIO_PLANE(plane, _PLANE_CSC_POSTOFF_HI_1(pipe) + \ + (index) * 4, _PLANE_CSC_POSTOFF_HI_2(pipe) + \ + (index) * 4) -:192: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'index' - possible side-effects? #192: FILE: drivers/gpu/drm/i915/i915_reg.h:11321: +#define PLANE_CSC_POSTOFF(pipe, plane, index) _MMIO_PLANE(plane, _PLANE_CSC_POSTOFF_HI_1(pipe) + \ + (index) * 4, _PLANE_CSC_POSTOFF_HI_2(pipe) + \ + (index) * 4) -:193: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #193: FILE: drivers/gpu/drm/i915/i915_reg.h:11322: + (index) * 4, _PLANE_CSC_POSTOFF_HI_2(pipe) + \ total: 0 errors, 3 warnings, 6 checks, 149 lines checked 35fe0920dc18 drm/i915/pxp: enable PXP for integrated Gen12 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
