commit drm/i915: disable shared panel fitter for pipe breaks resolution switching

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On 04/09/2013 07:42 PM, Hans de Bruin wrote:
> On 04/09/2013 06:40 PM, Daniel Vetter wrote:
>> Can you please quickly test whether the below patch changes anything
>> in the behaviour?
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 8809813..974ae32 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -4715,7 +4715,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc
>> *crtc,
>>
>>          i9xx_set_pipeconf(intel_crtc);
>>
>> -       intel_enable_pipe(dev_priv, pipe, false);
>> +       //intel_enable_pipe(dev_priv, pipe, false);
>>
>>          intel_wait_for_vblank(dev, pipe);
>>
>>
>>
>
>
> for some reason the diff did not work. Here a snippet of my modified
> intel_display.c:
>
>
> ...
>          /* pipesrc and dspsize control the size that is scaled from,
>           * which should always be the user's requested size.
>           */
>          I915_WRITE(DSPSIZE(plane),
>                     ((mode->vdisplay - 1) << 16) |
>                     (mode->hdisplay - 1));
>          I915_WRITE(DSPPOS(plane), 0);
>
>          I915_WRITE(PIPECONF(pipe), pipeconf);
>          POSTING_READ(PIPECONF(pipe));
>          //intel_enable_pipe(dev_priv, pipe, false);
>
>          intel_wait_for_vblank(dev, pipe);
>
>          I915_WRITE(DSPCNTR(plane), dspcntr);
>          POSTING_READ(DSPCNTR(plane));
> ...
>
> The screen still does not scale.
>
>
> By the way, I have had this problem before:
> https://bugzilla.kernel.org/show_bug.cgi?id=43071

sorry my mistake that one did scale, but just was not alligned properly.

-- 
Hans



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