On Tue, Apr 09, 2013 at 08:09:13PM +0300, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrj?l? <ville.syrjala at linux.intel.com>
>
> Our checks for an invalid fence stride forgot to guard against
> zero stride on gen4+. Fix it.
>
> v2: Avoid duplicated code (danvet)
>
> Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com>
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_gem_tiling.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
> index 139d17d..537545b 100644
> --- a/drivers/gpu/drm/i915/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
> @@ -238,6 +238,9 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
> }
> }
>
> + if (stride < tile_width)
> + return false;
> +
> /* 965+ just needs multiples of tile width */
> if (INTEL_INFO(dev)->gen >= 4) {
> if (stride & (tile_width - 1))
> @@ -246,9 +249,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
> }
>
> /* Pre-965 needs power of two tile widths */
> - if (stride < tile_width)
> - return false;
> -
> if (stride & (stride - 1))
> return false;
>
> --
> 1.8.1.5
>
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
