On Tue, Apr 09, 2013 at 04:44:28PM +0300, Mika Kuoppala wrote:
> Ben Widawsky <ben at bwidawsk.net> writes:
>
> > Requested-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 3 +--
> > 1 file changed, 1 insertion(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 2edb743..c81921b 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -2632,11 +2632,10 @@ static void gen6_enable_rps(struct drm_device *dev)
> > pcu_mbox = 0;
> > ret = sandybridge_pcode_read(dev_priv, GEN6_READ_OC_PARAMS, &pcu_mbox);
> > if (!ret && (pcu_mbox & (1<<31))) { /* OC supported */
> > - DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max from %dMHz to %dMHz\n",
> > + DRM_DEBUG_DRIVER("Overclocking supported. Max: %dMHz, Overclock max: %dMHz\n",
> > (dev_priv->rps.max_delay & 0xff) * 50,
> > (pcu_mbox & 0xff) * 50);
> Minor nitpick:
> Use GT_FREQUENCY_MULTIPLIER instead of 50
I've ignored that one for now ...
>
> > dev_priv->rps.hw_max = pcu_mbox & 0xff;
> > - dev_priv->rps.max_delay = pcu_mbox & 0xff;
> > }
> > } else {
> > DRM_DEBUG_DRIVER("Failed to set the min frequency\n");
> > --
> > 1.8.2
>
> Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>
Mika clarified that he indeed reviewed v2 of patch 1 but replied to the
wrong one. Both merged, thanks for the patches.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
