> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Imre
> Deak
> Sent: Friday, April 16, 2021 1:13 AM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH 10/11] drm/i915/adl_p: Require a minimum of
> 8 tiles stride for DPT FBs
>
> On Wed, Apr 14, 2021 at 06:52:07PM +0300, Imre Deak wrote:
> > The specification only requires DPT FB strides to be POT aligned, but
> > there seems to be also a minimum of 8 stride tile requirement.
> > Scanning out FBs with < 8 stride tiles will result in pipe faults
> > (even though the stride is POT aligned).
>
> This is now confirmed in bspec (index 53393).
>
> > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> > Acked-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_fb.c | 6 +++++-
> > 1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
> > b/drivers/gpu/drm/i915/display/intel_fb.c
> > index bd862f77762a2..2ee10ece27c57 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > @@ -609,7 +609,11 @@ plane_view_dst_stride_tiles(const struct
> intel_framebuffer *fb, int color_plane,
> > unsigned int pitch_tiles)
> > {
> > if (intel_fb_needs_pot_stride_remap(fb))
> > - return roundup_pow_of_two(pitch_tiles);
> > + /*
> > + * ADL_P, the only platform needing a POT stride has a
> minimum
> > + * of 8 stride tiles.
> > + */
> > + return roundup_pow_of_two(max(pitch_tiles, 8u));
> > else
> > return pitch_tiles;
> > }
> > --
> > 2.27.0
> >
> > _______________________________________________
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> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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