On Tue, 2 Apr 2013 19:58:37 +0200 Daniel Vetter <daniel at ffwll.ch> wrote: > On Tue, Apr 02, 2013 at 10:03:51AM -0700, Jesse Barnes wrote: > > We may need to disable the panel when flipping to a new buffer, so check > > the state here and zero it out if needed, otherwise leave it alone. > > > > v2: fixup pipe_set_base check (Imre) > > > > Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org> > > tbh I have no idea yet how we should best handle this and the following > patch. My current guess is that we need a special pipe_update path, which > sits in between the fb_update and the full modeset we currently have. A > bunch of things we might want to do in that case: > - kill the vga plane > - update watermarks to our (hopefully power-efficient) ones > - adjust pfit state (the bios tends to enable that even on non-lvds/edp > outputs) > - update other/global pm state (power well, refclocks, ...) > - update infoframes/audio bits (not relevant for panels luckily) > > Of course I'd prefer if the code is somehow shared between the update_pipe > path and the full modeset, since we'll inevitably get something wrong ... Agree that we should share code paths where possible. I think we could add new paths in enable/disable crtc for adjusting the global state. pfit would probably fit better there anyway, since it's not really panel specific. -- Jesse Barnes, Intel Open Source Technology Center
