Hi Dave and Daniel,
On my last pull request I incorrectly stated that
Async flips were enabled for all ilk+ platforms, while it
was only on SKL. I'm sorry about that.
I hope there's still time to include a few changes including
the actual patches that make this statement true for 5.12.
Along with other fixes and clean-up as described below:
Here goes drm-intel-next-2021-01-29:
- WARN if plane src coords are too big (Ville)
- Prevent double YUV range correction on HDR planes (Andres)
- DP MST related Fixes (Sean, Imre)
- More clean-up around DRAM detection code (Jose)
- Actually async flips enable for all ilk+ platforms (Ville)
Sorry and Thanks,
Rodrigo.
The following changes since commit 784953a46589276b38d7e6dcb5ebf7e29db72ff1:
drm/i915/display/vrr: Skip the VRR HW state readout on DSI transcoder (2021-01-26 16:34:53 -0800)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2021-01-29
for you to fetch changes up to 3b7bbb3619d2cc92f04ba10ad27d3b616aabf175:
drm/i915/dp: Prevent setting the LTTPR LT mode if no LTTPRs are detected (2021-01-29 22:00:07 +0200)
----------------------------------------------------------------
- WARN if plane src coords are too big (Ville)
- Prevent double YUV range correction on HDR planes (Andres)
- DP MST related Fixes (Sean, Imre)
- More clean-up around DRAM detection code (Jose)
- Actually async flips enable for all ilk+ platforms (Ville)
----------------------------------------------------------------
Andres Calderon Jaramillo (1):
drm/i915/display: Prevent double YUV range correction on HDR planes
Imre Deak (3):
drm/dp/mst: Export drm_dp_get_vc_payload_bw()
drm/i915: Fix the MST PBN divider calculation
drm/i915/dp: Prevent setting the LTTPR LT mode if no LTTPRs are detected
José Roberto de Souza (3):
drm/i915: Nuke not needed members of dram_info
drm/i915/gen11+: Only load DRAM information from pcode
drm/i915: Rename is_16gb_dimm to wm_lv_0_adjust_needed
Sean Paul (1):
drm/i915/hdcp: Disable the QSES check for HDCP 1.4 over MST
Ville Syrjälä (6):
drm/i915: WARN if plane src coords are too big
drm/i915: Limit plane stride to below TILEOFF.x limit
drm/i915: Implement async flips for bdw
drm/i915: Implement async flip for ivb/hsw
drm/i915: Implement async flip for ilk/snb
drm/i915: Implement async flips for vlv/chv
drivers/gpu/drm/drm_dp_mst_topology.c | 24 ++-
drivers/gpu/drm/i915/display/i9xx_plane.c | 213 ++++++++++++++++++++-
drivers/gpu/drm/i915/display/i9xx_plane.h | 2 +-
drivers/gpu/drm/i915/display/intel_bw.c | 80 +-------
drivers/gpu/drm/i915/display/intel_display.c | 16 +-
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 12 +-
.../gpu/drm/i915/display/intel_dp_link_training.c | 36 ++--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 98 ++++------
drivers/gpu/drm/i915/i915_drv.c | 9 +-
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers/gpu/drm/i915/i915_irq.c | 39 ++--
drivers/gpu/drm/i915/i915_reg.h | 3 +
drivers/gpu/drm/i915/intel_dram.c | 136 +++++++++----
drivers/gpu/drm/i915/intel_pm.c | 2 +-
include/drm/drm_dp_mst_helper.h | 1 +
16 files changed, 434 insertions(+), 247 deletions(-)
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