On Wed, Mar 13, 2013 at 11:21:05AM -0700, Ben Widawsky wrote:
> More registers we can't write.
>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
> drivers/gpu/drm/i915/i915_suspend.c | 57 ++++++++++++++++++++++++++-----------
> 1 file changed, 41 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index c1e02b0..dd5766a 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -333,11 +333,19 @@ int i915_save_state(struct drm_device *dev)
>
> mutex_lock(&dev->struct_mutex);
>
> - i915_save_display(dev);
> + if (!HAS_PCH_NOP(dev))
> + i915_save_display(dev);
This here looks a bit funny - imo it's better to move this check to the
only two places where we still touch registers in the kms case: lvds & pp
restore.
>
> if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
> /* Interrupt state */
> - if (HAS_PCH_SPLIT(dev)) {
> + if (HAS_PCH_NOP(dev)) {
> + dev_priv->regfile.saveDEIER = I915_READ(DEIER);
> + dev_priv->regfile.saveDEIMR = I915_READ(DEIMR);
> + dev_priv->regfile.saveGTIER = I915_READ(GTIER);
> + dev_priv->regfile.saveGTIMR = I915_READ(GTIMR);
> + dev_priv->regfile.saveMCHBAR_RENDER_STANDBY =
> + I915_READ(RSTDBYCTL);
> + } else if (HAS_PCH_SPLIT(dev)) {
> dev_priv->regfile.saveDEIER = I915_READ(DEIER);
> dev_priv->regfile.saveDEIMR = I915_READ(DEIMR);
> dev_priv->regfile.saveGTIER = I915_READ(GTIER);
> @@ -361,13 +369,18 @@ int i915_save_state(struct drm_device *dev)
> /* Memory Arbitration state */
> dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
>
> - /* Scratch space */
> - for (i = 0; i < 16; i++) {
> - dev_priv->regfile.saveSWF0[i] = I915_READ(SWF00 + (i << 2));
> - dev_priv->regfile.saveSWF1[i] = I915_READ(SWF10 + (i << 2));
> + if (!HAS_PCH_NOP(dev)) {
> + /* Scratch space */
> + for (i = 0; i < 16; i++) {
> + dev_priv->regfile.saveSWF0[i] =
> + I915_READ(SWF00 + (i << 2));
> + dev_priv->regfile.saveSWF1[i] =
> + I915_READ(SWF10 + (i << 2));
> + }
> + for (i = 0; i < 3; i++)
> + dev_priv->regfile.saveSWF2[i] =
> + I915_READ(SWF30 + (i << 2));
Blergh, I hate those registers, and I have no idea where we actually need
to restore them for kms. Can you please also add a big "XXX: Do we really
need this for kms?" comment in the scratch space block?
> }
> - for (i = 0; i < 3; i++)
> - dev_priv->regfile.saveSWF2[i] = I915_READ(SWF30 + (i << 2));
>
> mutex_unlock(&dev->struct_mutex);
>
> @@ -383,11 +396,17 @@ int i915_restore_state(struct drm_device *dev)
>
> mutex_lock(&dev->struct_mutex);
>
> - i915_restore_display(dev);
> + if (!HAS_PCH_NOP(dev))
> + i915_restore_display(dev);
>
> if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
> /* Interrupt state */
> - if (HAS_PCH_SPLIT(dev)) {
> + if (HAS_PCH_NOP(dev)) {
> + I915_WRITE(DEIER, dev_priv->regfile.saveDEIER);
> + I915_WRITE(DEIMR, dev_priv->regfile.saveDEIMR);
> + I915_WRITE(GTIER, dev_priv->regfile.saveGTIER);
> + I915_WRITE(GTIMR, dev_priv->regfile.saveGTIMR);
> + } else if (HAS_PCH_SPLIT(dev)) {
> I915_WRITE(DEIER, dev_priv->regfile.saveDEIER);
> I915_WRITE(DEIMR, dev_priv->regfile.saveDEIMR);
> I915_WRITE(GTIER, dev_priv->regfile.saveGTIER);
> @@ -407,16 +426,22 @@ int i915_restore_state(struct drm_device *dev)
> /* Memory arbitration state */
> I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);
>
> - for (i = 0; i < 16; i++) {
> - I915_WRITE(SWF00 + (i << 2), dev_priv->regfile.saveSWF0[i]);
> - I915_WRITE(SWF10 + (i << 2), dev_priv->regfile.saveSWF1[i]);
> + if (!HAS_PCH_NOP(dev)) {
> + for (i = 0; i < 16; i++) {
> + I915_WRITE(SWF00 + (i << 2),
> + dev_priv->regfile.saveSWF0[i]);
> + I915_WRITE(SWF10 + (i << 2),
> + dev_priv->regfile.saveSWF1[i]);
> + }
> + for (i = 0; i < 3; i++)
> + I915_WRITE(SWF30 + (i << 2),
> + dev_priv->regfile.saveSWF2[i]);
> }
> - for (i = 0; i < 3; i++)
> - I915_WRITE(SWF30 + (i << 2), dev_priv->regfile.saveSWF2[i]);
>
> mutex_unlock(&dev->struct_mutex);
>
> - intel_i2c_reset(dev);
> + if (!HAS_PCH_NOP(dev))
> + intel_i2c_reset(dev);
>
> return 0;
> }
> --
> 1.8.1.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
