[PATCH 04/15] drm/i915: don't touch the PF regs if the power well is down

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On Thu, Mar 07, 2013 at 12:28:32AM +0100, Daniel Vetter wrote:
> On Wed, Mar 06, 2013 at 08:03:11PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> > 
> > This solves some "unclaimed register" messages when booting the
> > machine with eDP attached.
> > 
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c |    6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index bd27336..9a9f6d7 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -3584,8 +3584,10 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
> >  	intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
> >  
> >  	/* Disable PF */
> > -	I915_WRITE(PF_CTL(pipe), 0);
> > -	I915_WRITE(PF_WIN_SZ(pipe), 0);
> > +	if (!intel_power_well_is_down(dev)) {
> > +		I915_WRITE(PF_CTL(pipe), 0);
> > +		I915_WRITE(PF_WIN_SZ(pipe), 0);
> > +	}
> 
> I'd vote for a /* XXX: Once we have proper pfit state tracking implemented
> with hw state read/check support we should switch to only disable the pfit
> when we know it's used */
> 
> The idea is that the power well code here irks me a bit, after all if
> something is on and we want to disable it, it can't be also off due to the
> power well being down ;-)
> -Daniel


Daniel, your second paragraph doesn't make sense to me. I agree with the
first paragraph, but I like that this fixes a real error message in the
meantime. As best I can tell, there is nothing wrong with the code on
the existing d-i-n.

Paulo: P.S. This doesn't help my previous bikeshed about not needing an
IS_HASWELL check in intel_power_well_is_down() ;-).


> 
> >  
> >  	intel_ddi_disable_pipe_clock(intel_crtc);
> >  
> > -- 
> > 1.7.10.4
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ben Widawsky, Intel Open Source Technology Center


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