> Accroding to the docs these bits don't exist on PCH platforms. > intel_crt_dpms() already has a check for this, so I suppose > intel_disable_crt() should have one too. > > Also I noticed that we seem to have the hsync and vsync disable > bits reversed. At least that's what the docs are telling me. The PCH check just forces suspend and standby to off and we're only doing dpms off in intel_disable_crt() so no need to check it there. I'm looking at the 965/G35 PRM and the "sync disable" are defined correctly but used incorrectly in intel_disable_crt(). That's what my patch fixes. I haven't checked the other PRMs. Is it different on newer hardware? I'm thinking that this is related to the bug 56359. The thing that triggers it seems to be that ADPA sometimes get connected to the same pipe as LVDS and somehow VSYNC and HSYNC trickles through. This might be fixed by setting the ADPA pipe again in intel_enable_crt() and/or intel_crt_dpms(). Thanks Patrik
