Reading backlight status from PPS register doesn't require AUX power on the platform which has South Display Engine on PCH. It invokes a unnecessary power well enable/disable noise. optimize it wherever is possible. Signed-off-by: Anshuman Gupta <anshuman.gupta@xxxxxxxxx> --- drivers/gpu/drm/i915/display/intel_dp.c | 47 +++++++++++++++++++++++-- 1 file changed, 45 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 3896d08c4177..37371aa5f7c5 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -892,6 +892,47 @@ pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref) return 0; } +/* + * Platform with PCH based SDE doesn't require to enable AUX power + * for simple PPS register access like whether backlight is enabled. + * use pch_pps_lock()/pch_pps_unlock() wherever we don't require + * aux power to avoid unnecessary power well enable/disable back + * and forth. + */ +static intel_wakeref_t +pch_pps_lock(struct intel_dp *intel_dp) +{ + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + intel_wakeref_t wakeref; + + if (!HAS_PCH_SPLIT(dev_priv)) + wakeref = intel_display_power_get(dev_priv, + intel_aux_power_domain(dp_to_dig_port(intel_dp))); + else + wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); + + mutex_lock(&dev_priv->pps_mutex); + + return wakeref; +} + +static intel_wakeref_t +pch_pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref) +{ + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + + mutex_unlock(&dev_priv->pps_mutex); + + if (!HAS_PCH_SPLIT(dev_priv)) + intel_display_power_put(dev_priv, + intel_aux_power_domain(dp_to_dig_port(intel_dp)), + wakeref); + else + intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); + + return 0; +} + #define with_pps_lock(dp, wf) \ for ((wf) = pps_lock(dp); (wf); (wf) = pps_unlock((dp), (wf))) @@ -3449,8 +3490,10 @@ static void intel_edp_backlight_power(struct intel_connector *connector, bool is_enabled; is_enabled = false; - with_pps_lock(intel_dp, wakeref) - is_enabled = ilk_get_pp_control(intel_dp) & EDP_BLC_ENABLE; + wakeref = pch_pps_lock(intel_dp); + is_enabled = ilk_get_pp_control(intel_dp) & EDP_BLC_ENABLE; + pch_pps_unlock(intel_dp, wakeref); + if (is_enabled == enable) return; -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx