Hi all, To actually be able to implement fdi link bpc dithering we need to have working plane/pipe bpp handling. The current code doesn't manage that - I've had way too many black screens and other funny issues. Note that I currently lack a high-color-depth screen, so I couldn't test anything with a 10bpc dp screen or a 12bpc hdmi capable screen. Anyone who has such a thing, testing highly welcome. After these patches I can at least fire up X in any sane bitdepth and things still work. Cheers, Daniel Daniel Vetter (10): drm/i915: use pipe_config for lvds dithering drm/i915: consolidate pch pll computations a bit drm/i915: fixup 12bpc hdmi dotclock handling drm/i915: Disable high-bpc on pre-1.4 EDID screens drm/i915: force bpp for eDP panels drm/i915: extract i9xx_set_pipeconf drm/i915: drop adjusted_mode from *_set_pipeconf functions drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv drm/i915: allow high-bpc modes on DP drm/i915: Fixup non-24bpp support for VGA screens on Haswell drivers/gpu/drm/i915/intel_crt.c | 4 + drivers/gpu/drm/i915/intel_display.c | 179 ++++++++++++++++++----------------- drivers/gpu/drm/i915/intel_dp.c | 13 ++- drivers/gpu/drm/i915/intel_drv.h | 5 + drivers/gpu/drm/i915/intel_hdmi.c | 23 ++++- drivers/gpu/drm/i915/intel_lvds.c | 14 +-- 6 files changed, 139 insertions(+), 99 deletions(-) -- 1.7.11.4
