[PATCH] drm/i915: Kill pipestat[] cache

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On Thu, Feb 21, 2013 at 10:34:54AM +0200, Jani Nikula wrote:
> On Wed, 20 Feb 2013, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrj?l? <ville.syrjala at linux.intel.com>
> >
> > Caching the PIPESTAT enable bits has been deemed pointless. Just
> > read them from the register itself.
> 
> Reviewed-by: Jani Nikula <jani.nikula at intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


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