On Wed, 20 Feb 2013 15:07:10 +0000 Chris Wilson <chris at chris-wilson.co.uk> wrote: > On Wed, Feb 20, 2013 at 04:47:16PM +0200, ville.syrjala at linux.intel.com wrote: > > From: Ville Syrj?l? <ville.syrjala at linux.intel.com> > > > > The pipestat array size should have space for every pipe in the system. > > Use the define we have for it. > > Tbh, I think that cache should die. I think the hitrate is near zero, > and offers no benefit over just writing the register directly. > -Chris > Seconded. -- Jesse Barnes, Intel Open Source Technology Center