On Fri, Feb 08, 2013 at 05:35:12PM -0200, Paulo Zanoni wrote: > From: Paulo Zanoni <paulo.r.zanoni at intel.com> > > This avoids polluting i915_write##x and also allows us to reuse code > on i915_read##x. > > v2: Rebase > > Reviewed-by: Ben Widawsky <ben at bwidawsk.net> (v1) > Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com> Checkpatch complained about the macro parameters not being enclosed in (reg) params. I tend to agree, so maybe just extract the entire thing into a static inline function while at it? -Daniel > --- > drivers/gpu/drm/i915/i915_drv.c | 24 ++++++++++++++++-------- > 1 file changed, 16 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index c5b8c81..e24c337 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1131,6 +1131,20 @@ ilk_dummy_write(struct drm_i915_private *dev_priv) > I915_WRITE_NOTRACE(MI_MODE, 0); > } > > +#define UNCLAIMED_REG_CLEAR(dev_priv, reg) \ > + if (IS_HASWELL(dev_priv->dev) && \ > + (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \ > + DRM_ERROR("Unknown unclaimed register before writing to %x\n", reg); \ > + I915_WRITE_NOTRACE(GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \ > + } > + > +#define UNCLAIMED_REG_CHECK(dev_priv, reg) \ > + if (IS_HASWELL(dev_priv->dev) && \ > + (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \ > + DRM_ERROR("Unclaimed write to %x\n", reg); \ > + writel(ERR_INT_MMIO_UNCLAIMED, dev_priv->regs + GEN7_ERR_INT); \ > + } > + > #define __i915_read(x, y) \ > u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ > u##x val = 0; \ > @@ -1167,18 +1181,12 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \ > } \ > if (IS_GEN5(dev_priv->dev)) \ > ilk_dummy_write(dev_priv); \ > - if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \ > - DRM_ERROR("Unknown unclaimed register before writing to %x\n", reg); \ > - I915_WRITE_NOTRACE(GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \ > - } \ > + UNCLAIMED_REG_CLEAR(dev_priv, reg); \ > write##y(val, dev_priv->regs + reg); \ > if (unlikely(__fifo_ret)) { \ > gen6_gt_check_fifodbg(dev_priv); \ > } \ > - if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \ > - DRM_ERROR("Unclaimed write to %x\n", reg); \ > - writel(ERR_INT_MMIO_UNCLAIMED, dev_priv->regs + GEN7_ERR_INT); \ > - } \ > + UNCLAIMED_REG_CHECK(dev_priv, reg); \ > } > __i915_write(8, b) > __i915_write(16, w) > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch