The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
I had to drop how mesa splits msg_control as the current assembly
language gives access the the whole msg_control field.
Recompiling the xorg and the intel driver of libva shaders doesn't show
any difference in the assembly created.
Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
---
assembler/brw_structs.h | 31 ++++++++++++++++++++-----------
assembler/gram.y | 26 +++++++++++++-------------
2 files changed, 33 insertions(+), 24 deletions(-)
diff --git a/assembler/brw_structs.h b/assembler/brw_structs.h
index e571052..cfb3028 100644
--- a/assembler/brw_structs.h
+++ b/assembler/brw_structs.h
@@ -1536,17 +1536,26 @@ struct brw_instruction
GLuint end_of_thread:1;
} gen6_dp;
- struct {
- GLuint binding_table_index:8;
- GLuint msg_control:6;
- GLuint msg_type:4;
- GLuint category:1;
- GLuint header_present:1;
- GLuint response_length:5;
- GLuint msg_length:4;
- GLuint pad1:2;
- GLuint end_of_thread:1;
- } dp_gen7;
+ /**
+ * Message for any of the Gen7 Data Port caches.
+ *
+ * Most fields are defined in BSpec volume 5c.2 Data Port / Messages /
+ * Data Port Messages / Message Descriptor. Once again, "Slot Group
+ * Select" and "Last Render Target" are part of the 6-bit message
+ * control for Render Target Writes.
+ */
+ struct {
+ GLuint binding_table_index:8;
+ GLuint msg_control:6;
+ GLuint msg_type:4;
+ GLuint category:1;
+ GLuint header_present:1;
+ GLuint response_length:5;
+ GLuint msg_length:4;
+ GLuint pad2:2;
+ GLuint end_of_thread:1;
+ } gen7_dp;
+ /** @} */
struct {
GLuint opcode:1;
diff --git a/assembler/gram.y b/assembler/gram.y
index df26393..1295d60 100644
--- a/assembler/gram.y
+++ b/assembler/gram.y
@@ -1253,9 +1253,9 @@ msgtarget: NULL_TOKEN
$$.bits2.send_gen5.sfid =
BRW_MESSAGE_TARGET_DP_SC;
$$.bits3.generic_gen5.header_present = 1;
- $$.bits3.dp_gen7.binding_table_index = $3;
- $$.bits3.dp_gen7.msg_control = $7;
- $$.bits3.dp_gen7.msg_type = $9;
+ $$.bits3.gen7_dp.binding_table_index = $3;
+ $$.bits3.gen7_dp.msg_control = $7;
+ $$.bits3.gen7_dp.msg_type = $9;
} else if (IS_GENx(6)) {
$$.bits2.send_gen5.sfid =
BRW_MESSAGE_TARGET_DP_SC;
@@ -1287,9 +1287,9 @@ msgtarget: NULL_TOKEN
$$.bits2.send_gen5.sfid =
BRW_MESSAGE_TARGET_DP_RC;
$$.bits3.generic_gen5.header_present = 1;
- $$.bits3.dp_gen7.binding_table_index = $3;
- $$.bits3.dp_gen7.msg_control = $5;
- $$.bits3.dp_gen7.msg_type = $7;
+ $$.bits3.gen7_dp.binding_table_index = $3;
+ $$.bits3.gen7_dp.msg_control = $5;
+ $$.bits3.gen7_dp.msg_type = $7;
} else if (IS_GENx(6)) {
$$.bits2.send_gen5.sfid =
BRW_MESSAGE_TARGET_DP_RC;
@@ -1332,9 +1332,9 @@ msgtarget: NULL_TOKEN
$$.bits2.send_gen5.sfid =
BRW_MESSAGE_TARGET_DP_RC;
$$.bits3.generic_gen5.header_present = ($11 != 0);
- $$.bits3.dp_gen7.binding_table_index = $3;
- $$.bits3.dp_gen7.msg_control = $5;
- $$.bits3.dp_gen7.msg_type = $7;
+ $$.bits3.gen7_dp.binding_table_index = $3;
+ $$.bits3.gen7_dp.msg_control = $5;
+ $$.bits3.gen7_dp.msg_type = $7;
} else if (IS_GENx(6)) {
$$.bits2.send_gen5.sfid =
BRW_MESSAGE_TARGET_DP_RC;
@@ -1459,10 +1459,10 @@ msgtarget: NULL_TOKEN
YYERROR;
}
- $$.bits3.dp_gen7.category = $11;
- $$.bits3.dp_gen7.binding_table_index = $9;
- $$.bits3.dp_gen7.msg_control = $7;
- $$.bits3.dp_gen7.msg_type = $5;
+ $$.bits3.gen7_dp.category = $11;
+ $$.bits3.gen7_dp.binding_table_index = $9;
+ $$.bits3.gen7_dp.msg_control = $7;
+ $$.bits3.gen7_dp.msg_type = $5;
} else if (IS_GENx(6)) {
if ($3 != BRW_MESSAGE_TARGET_DP_SC &&
$3 != BRW_MESSAGE_TARGET_DP_RC &&
--
1.7.7.5
