[PATCH 24/33] drm/i915: VLV doesn't seem to have VGA0/VGA1/VGA_PD registers

[ville.syrjala at linux.intel.com (ville.syrjala at linux.intel.com)]

From: Ville Syrj?l? <ville.syrjala at linux.intel.com>

Don't touch VGA0/VGA1/VGA_PD in suspend/resume paths.

Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_suspend.c | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 63d4d30..05d82dc 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -691,9 +691,11 @@ static void i915_save_display(struct drm_device *dev)
 	}
 
 	/* VGA state */
-	dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
-	dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
-	dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);
+	if (!IS_VALLEYVIEW(dev)) {
+		dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
+		dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
+		dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);
+	}
 	if (HAS_PCH_SPLIT(dev))
 		dev_priv->regfile.saveVGACNTRL = I915_READ(CPU_VGACNTRL);
 	else
@@ -793,11 +795,13 @@ static void i915_restore_display(struct drm_device *dev)
 	else
 		I915_WRITE(VGACNTRL, dev_priv->regfile.saveVGACNTRL);
 
-	I915_WRITE(VGA0, dev_priv->regfile.saveVGA0);
-	I915_WRITE(VGA1, dev_priv->regfile.saveVGA1);
-	I915_WRITE(VGA_PD, dev_priv->regfile.saveVGA_PD);
-	POSTING_READ(VGA_PD);
-	udelay(150);
+	if (!IS_VALLEYVIEW(dev)) {
+		I915_WRITE(VGA0, dev_priv->regfile.saveVGA0);
+		I915_WRITE(VGA1, dev_priv->regfile.saveVGA1);
+		I915_WRITE(VGA_PD, dev_priv->regfile.saveVGA_PD);
+		POSTING_READ(VGA_PD);
+		udelay(150);
+	}
 
 	i915_restore_vga(dev);
 }
-- 
1.7.12.4