On Fri, 18 Jan 2013, Paulo Zanoni <przanoni at gmail.com> wrote: > From: Paulo Zanoni <paulo.r.zanoni at intel.com> > > Our documentation is wrong, this register does not exist on port A, so > sleep 800us since it's the timeout mentioned on the mode set sequence > document. Would be nice to have some reference, like documentation, to back up the claim that the documentation is wrong... Maybe a comment near #define DP_TP_STATUS() in i915_reg.h would be in order too. > > This fixes error messages, including "unclaimed register". > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 1492706..d83c279 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1788,9 +1788,12 @@ intel_dp_set_link_train(struct intel_dp *intel_dp, > temp |= DP_TP_CTL_LINK_TRAIN_IDLE; > I915_WRITE(DP_TP_CTL(port), temp); > > - if (wait_for((I915_READ(DP_TP_STATUS(port)) & > - DP_TP_STATUS_IDLE_DONE), 1)) > - DRM_ERROR("Timed out waiting for DP idle patterns\n"); > + if (port == PORT_A) > + udelay(800); usleep_range()? > + else > + if (wait_for((I915_READ(DP_TP_STATUS(port)) & > + DP_TP_STATUS_IDLE_DONE), 1)) > + DRM_ERROR("Timed out waiting for DP idle patterns\n"); > > temp &= ~DP_TP_CTL_LINK_TRAIN_MASK; > temp |= DP_TP_CTL_LINK_TRAIN_NORMAL; > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx