[PATCH 04/13] drm/i915: Create a gtt structure

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why not put gtt_mtrr to new gtt struct?

anyways, feel free to use Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>

On Tue, Jan 15, 2013 at 7:26 PM, Ben Widawsky <ben at bwidawsk.net> wrote:
> The purpose of the gtt structure is to help isolate our gtt specific
> properties from the rest of the code (in doing so it help us finish the
> isolation from the AGP connection).
>
> The following members are pulled out (and renamed):
> gtt_start
> gtt_total
> gtt_mappable_end
> gtt_mappable
> gtt_base_addr
> gsm
>
> The gtt structure will serve as a nice place to put gen specific gtt
> routines in upcoming patches.
>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c        |  4 ++--
>  drivers/gpu/drm/i915/i915_dma.c            | 20 ++++++++++----------
>  drivers/gpu/drm/i915/i915_drv.h            | 29 +++++++++++++++++++++--------
>  drivers/gpu/drm/i915/i915_gem.c            | 17 +++++++++--------
>  drivers/gpu/drm/i915/i915_gem_evict.c      |  2 +-
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |  2 +-
>  drivers/gpu/drm/i915/i915_gem_gtt.c        | 24 ++++++++++++------------
>  drivers/gpu/drm/i915/i915_gem_tiling.c     |  2 +-
>  drivers/gpu/drm/i915/i915_irq.c            |  4 ++--
>  drivers/gpu/drm/i915/intel_display.c       |  2 +-
>  drivers/gpu/drm/i915/intel_fb.c            |  2 +-
>  drivers/gpu/drm/i915/intel_overlay.c       |  4 ++--
>  12 files changed, 63 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 2f14b6d..7123af4 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -259,8 +259,8 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
>                    count, size);
>
>         seq_printf(m, "%zu [%zu] gtt total\n",
> -                  dev_priv->mm.gtt_total,
> -                  dev_priv->mm.gtt_mappable_end - dev_priv->mm.gtt_start);
> +                  dev_priv->gtt.total,
> +                  dev_priv->gtt.mappable_end - dev_priv->gtt.start);
>
>         mutex_unlock(&dev->struct_mutex);
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 272e500..bb4382f 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1067,7 +1067,7 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
>         ring->status_page.gfx_addr = hws->addr & (0x1ffff<<12);
>
>         dev_priv->dri1.gfx_hws_cpu_addr =
> -               ioremap_wc(dev_priv->mm.gtt_base_addr + hws->addr, 4096);
> +               ioremap_wc(dev_priv->gtt.mappable_base + hws->addr, 4096);
>         if (dev_priv->dri1.gfx_hws_cpu_addr == NULL) {
>                 i915_dma_cleanup(dev);
>                 ring->status_page.gfx_addr = 0;
> @@ -1534,17 +1534,17 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
>         }
>
>         aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
> -       dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr;
> +       dev_priv->gtt.mappable_base = dev_priv->mm.gtt->gma_bus_addr;
>
> -       dev_priv->mm.gtt_mapping =
> -               io_mapping_create_wc(dev_priv->mm.gtt_base_addr,
> +       dev_priv->gtt.mappable =
> +               io_mapping_create_wc(dev_priv->gtt.mappable_base,
>                                      aperture_size);
> -       if (dev_priv->mm.gtt_mapping == NULL) {
> +       if (dev_priv->gtt.mappable == NULL) {
>                 ret = -EIO;
>                 goto out_rmmap;
>         }
>
> -       i915_mtrr_setup(dev_priv, dev_priv->mm.gtt_base_addr,
> +       i915_mtrr_setup(dev_priv, dev_priv->gtt.mappable_base,
>                         aperture_size);
>
>         /* The i915 workqueue is primarily used for batched retirement of
> @@ -1649,11 +1649,11 @@ out_gem_unload:
>  out_mtrrfree:
>         if (dev_priv->mm.gtt_mtrr >= 0) {
>                 mtrr_del(dev_priv->mm.gtt_mtrr,
> -                        dev_priv->mm.gtt_base_addr,
> +                        dev_priv->gtt.mappable_base,
>                          aperture_size);
>                 dev_priv->mm.gtt_mtrr = -1;
>         }
> -       io_mapping_free(dev_priv->mm.gtt_mapping);
> +       io_mapping_free(dev_priv->gtt.mappable);
>  out_rmmap:
>         pci_iounmap(dev->pdev, dev_priv->regs);
>  put_gmch:
> @@ -1687,10 +1687,10 @@ int i915_driver_unload(struct drm_device *dev)
>         /* Cancel the retire work handler, which should be idle now. */
>         cancel_delayed_work_sync(&dev_priv->mm.retire_work);
>
> -       io_mapping_free(dev_priv->mm.gtt_mapping);
> +       io_mapping_free(dev_priv->gtt.mappable);
>         if (dev_priv->mm.gtt_mtrr >= 0) {
>                 mtrr_del(dev_priv->mm.gtt_mtrr,
> -                        dev_priv->mm.gtt_base_addr,
> +                        dev_priv->gtt.mappable_base,
>                          dev_priv->mm.gtt->gtt_mappable_entries * PAGE_SIZE);
>                 dev_priv->mm.gtt_mtrr = -1;
>         }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 5985ed0..51766d2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -364,6 +364,25 @@ struct intel_device_info {
>         u8 has_llc:1;
>  };
>
> +/* The Graphics Translation Table is the way in which GEN hardware translates a
> + * Graphics Virtual Address into a Physical Address. In addition to the normal
> + * collateral associated with any va->pa translations GEN hardware also has a
> + * portion of the GTT which can be mapped by the CPU and remain both coherent
> + * and correct (in cases like swizzling). That region is referred to as GMADR in
> + * the spec.
> + */
> +struct i915_gtt {
> +       unsigned long start;            /* Start offset of used GTT */
> +       size_t total;                   /* Total size GTT can map */
> +
> +       unsigned long mappable_end;     /* End offset that we can CPU map */
> +       struct io_mapping *mappable;    /* Mapping to our CPU mappable region */
> +       phys_addr_t mappable_base;      /* PA of our GMADR */
> +
> +       /** "Graphics Stolen Memory" holds the global PTEs */
> +       void __iomem *gsm;
> +};
> +
>  #define I915_PPGTT_PD_ENTRIES 512
>  #define I915_PPGTT_PT_ENTRIES 1024
>  struct i915_hw_ppgtt {
> @@ -777,6 +796,8 @@ typedef struct drm_i915_private {
>         /* Register state */
>         bool modeset_on_lid;
>
> +       struct i915_gtt gtt;
> +
>         struct {
>                 /** Bridge to intel-gtt-ko */
>                 struct intel_gtt *gtt;
> @@ -795,15 +816,8 @@ typedef struct drm_i915_private {
>                 struct list_head unbound_list;
>
>                 /** Usable portion of the GTT for GEM */
> -               unsigned long gtt_start;
> -               unsigned long gtt_mappable_end;
>                 unsigned long stolen_base; /* limited to low memory (32-bit) */
>
> -               /** "Graphics Stolen Memory" holds the global PTEs */
> -               void __iomem *gsm;
> -
> -               struct io_mapping *gtt_mapping;
> -               phys_addr_t gtt_base_addr;
>                 int gtt_mtrr;
>
>                 /** PPGTT used for aliasing the PPGTT with the GTT */
> @@ -880,7 +894,6 @@ typedef struct drm_i915_private {
>                 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
>
>                 /* accounting, useful for userland debugging */
> -               size_t gtt_total;
>                 size_t object_memory;
>                 u32 object_count;
>         } mm;
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index ad98db5..4ec66a9 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -149,6 +149,7 @@ int
>  i915_gem_init_ioctl(struct drm_device *dev, void *data,
>                     struct drm_file *file)
>  {
> +       struct drm_i915_private *dev_priv = dev->dev_private;
>         struct drm_i915_gem_init *args = data;
>
>         if (drm_core_check_feature(dev, DRIVER_MODESET))
> @@ -186,7 +187,7 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
>                         pinned += obj->gtt_space->size;
>         mutex_unlock(&dev->struct_mutex);
>
> -       args->aper_size = dev_priv->mm.gtt_total;
> +       args->aper_size = dev_priv->gtt.total;
>         args->aper_available_size = args->aper_size - pinned;
>
>         return 0;
> @@ -637,7 +638,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev,
>                  * source page isn't available.  Return the error and we'll
>                  * retry in the slow path.
>                  */
> -               if (fast_user_write(dev_priv->mm.gtt_mapping, page_base,
> +               if (fast_user_write(dev_priv->gtt.mappable, page_base,
>                                     page_offset, user_data, page_length)) {
>                         ret = -EFAULT;
>                         goto out_unpin;
> @@ -1362,7 +1363,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
>
>         obj->fault_mappable = true;
>
> -       pfn = ((dev_priv->mm.gtt_base_addr + obj->gtt_offset) >> PAGE_SHIFT) +
> +       pfn = ((dev_priv->gtt.mappable_base + obj->gtt_offset) >> PAGE_SHIFT) +
>                 page_offset;
>
>         /* Finally, remap it using the new GTT offset */
> @@ -1568,7 +1569,7 @@ i915_gem_mmap_gtt(struct drm_file *file,
>                 goto unlock;
>         }
>
> -       if (obj->base.size > dev_priv->mm.gtt_mappable_end) {
> +       if (obj->base.size > dev_priv->gtt.mappable_end) {
>                 ret = -E2BIG;
>                 goto out;
>         }
> @@ -2944,7 +2945,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
>          * before evicting everything in a vain attempt to find space.
>          */
>         if (obj->base.size >
> -           (map_and_fenceable ? dev_priv->mm.gtt_mappable_end : dev_priv->mm.gtt_total)) {
> +           (map_and_fenceable ? dev_priv->gtt.mappable_end : dev_priv->gtt.total)) {
>                 DRM_ERROR("Attempting to bind an object larger than the aperture\n");
>                 return -E2BIG;
>         }
> @@ -2959,7 +2960,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
>         if (map_and_fenceable)
>                 free_space = drm_mm_search_free_in_range_color(&dev_priv->mm.gtt_space,
>                                                                size, alignment, obj->cache_level,
> -                                                              0, dev_priv->mm.gtt_mappable_end,
> +                                                              0, dev_priv->gtt.mappable_end,
>                                                                false);
>         else
>                 free_space = drm_mm_search_free_color(&dev_priv->mm.gtt_space,
> @@ -2971,7 +2972,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
>                         free_space =
>                                 drm_mm_get_block_range_generic(free_space,
>                                                                size, alignment, obj->cache_level,
> -                                                              0, dev_priv->mm.gtt_mappable_end,
> +                                                              0, dev_priv->gtt.mappable_end,
>                                                                false);
>                 else
>                         free_space =
> @@ -3017,7 +3018,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
>                 (free_space->start & (fence_alignment - 1)) == 0;
>
>         mappable =
> -               obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end;
> +               obj->gtt_offset + obj->base.size <= dev_priv->gtt.mappable_end;
>
>         obj->map_and_fenceable = mappable && fenceable;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
> index 776a322..c86d5d9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_evict.c
> +++ b/drivers/gpu/drm/i915/i915_gem_evict.c
> @@ -80,7 +80,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
>         if (mappable)
>                 drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space,
>                                             min_size, alignment, cache_level,
> -                                           0, dev_priv->mm.gtt_mappable_end);
> +                                           0, dev_priv->gtt.mappable_end);
>         else
>                 drm_mm_init_scan(&dev_priv->mm.gtt_space,
>                                  min_size, alignment, cache_level);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 6cd3e1c..0924be9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -209,7 +209,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
>
>                 /* Map the page containing the relocation we're going to perform.  */
>                 reloc->offset += obj->gtt_offset;
> -               reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
> +               reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
>                                                       reloc->offset & PAGE_MASK);
>                 reloc_entry = (uint32_t __iomem *)
>                         (reloc_page + (reloc->offset & ~PAGE_MASK));
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index f79081e..e044f58 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -290,7 +290,7 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
>                 return;
>
>
> -       pd_addr = (gtt_pte_t __iomem*)dev_priv->mm.gsm + ppgtt->pd_offset/sizeof(gtt_pte_t);
> +       pd_addr = (gtt_pte_t __iomem*)dev_priv->gtt.gsm + ppgtt->pd_offset/sizeof(gtt_pte_t);
>         for (i = 0; i < ppgtt->num_pd_entries; i++) {
>                 dma_addr_t pt_addr;
>
> @@ -367,7 +367,7 @@ static void i915_ggtt_clear_range(struct drm_device *dev,
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         gtt_pte_t scratch_pte;
> -       gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->mm.gsm + first_entry;
> +       gtt_pte_t __iomem *gtt_base = (gtt_pte_t __iomem *) dev_priv->gtt.gsm + first_entry;
>         const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
>         int i;
>
> @@ -393,8 +393,8 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
>         struct drm_i915_gem_object *obj;
>
>         /* First fill our portion of the GTT with scratch pages */
> -       i915_ggtt_clear_range(dev, dev_priv->mm.gtt_start / PAGE_SIZE,
> -                             dev_priv->mm.gtt_total / PAGE_SIZE);
> +       i915_ggtt_clear_range(dev, dev_priv->gtt.start / PAGE_SIZE,
> +                             dev_priv->gtt.total / PAGE_SIZE);
>
>         list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
>                 i915_gem_clflush_object(obj);
> @@ -433,7 +433,7 @@ static void gen6_ggtt_bind_object(struct drm_i915_gem_object *obj,
>         const int first_entry = obj->gtt_space->start >> PAGE_SHIFT;
>         const int max_entries = dev_priv->mm.gtt->gtt_total_entries - first_entry;
>         gtt_pte_t __iomem *gtt_entries =
> -               (gtt_pte_t __iomem *)dev_priv->mm.gsm + first_entry;
> +               (gtt_pte_t __iomem *)dev_priv->gtt.gsm + first_entry;
>         int unused, i = 0;
>         unsigned int len, m = 0;
>         dma_addr_t addr;
> @@ -556,9 +556,9 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
>                 obj->has_global_gtt_mapping = 1;
>         }
>
> -       dev_priv->mm.gtt_start = start;
> -       dev_priv->mm.gtt_mappable_end = mappable_end;
> -       dev_priv->mm.gtt_total = end - start;
> +       dev_priv->gtt.start = start;
> +       dev_priv->gtt.mappable_end = mappable_end;
> +       dev_priv->gtt.total = end - start;
>
>         /* Clear any non-preallocated blocks */
>         drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
> @@ -748,9 +748,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
>                 goto err_out;
>         }
>
> -       dev_priv->mm.gsm = ioremap_wc(gtt_bus_addr,
> -                                     dev_priv->mm.gtt->gtt_total_entries * sizeof(gtt_pte_t));
> -       if (!dev_priv->mm.gsm) {
> +       dev_priv->gtt.gsm = ioremap_wc(gtt_bus_addr,
> +                                      dev_priv->mm.gtt->gtt_total_entries * sizeof(gtt_pte_t));
> +       if (!dev_priv->gtt.gsm) {
>                 DRM_ERROR("Failed to map the gtt page table\n");
>                 teardown_scratch_page(dev);
>                 ret = -ENOMEM;
> @@ -774,7 +774,7 @@ err_out:
>  void i915_gem_gtt_fini(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
> -       iounmap(dev_priv->mm.gsm);
> +       iounmap(dev_priv->gtt.gsm);
>         teardown_scratch_page(dev);
>         if (INTEL_INFO(dev)->gen < 6)
>                 intel_gmch_remove();
> diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
> index 65f1d4f..eaaf2be 100644
> --- a/drivers/gpu/drm/i915/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
> @@ -368,7 +368,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
>
>                 obj->map_and_fenceable =
>                         obj->gtt_space == NULL ||
> -                       (obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end &&
> +                       (obj->gtt_offset + obj->base.size <= dev_priv->gtt.mappable_end &&
>                          i915_gem_object_fence_ok(obj, args->tiling_mode));
>
>                 /* Rebind if we need a change of alignment */
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 6ba0573..62aae5d 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -939,7 +939,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
>                         goto unwind;
>
>                 local_irq_save(flags);
> -               if (reloc_offset < dev_priv->mm.gtt_mappable_end &&
> +               if (reloc_offset < dev_priv->gtt.mappable_end &&
>                     src->has_global_gtt_mapping) {
>                         void __iomem *s;
>
> @@ -948,7 +948,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
>                          * captures what the GPU read.
>                          */
>
> -                       s = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
> +                       s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
>                                                      reloc_offset);
>                         memcpy_fromio(d, s, PAGE_SIZE);
>                         io_mapping_unmap_atomic(s);
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 162cb22..723161b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8506,7 +8506,7 @@ void intel_modeset_init(struct drm_device *dev)
>                 dev->mode_config.max_width = 8192;
>                 dev->mode_config.max_height = 8192;
>         }
> -       dev->mode_config.fb_base = dev_priv->mm.gtt_base_addr;
> +       dev->mode_config.fb_base = dev_priv->gtt.mappable_base;
>
>         DRM_DEBUG_KMS("%d display pipe%s available.\n",
>                       dev_priv->num_pipe, dev_priv->num_pipe > 1 ? "s" : "");
> diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
> index 71d5580..ce02af8 100644
> --- a/drivers/gpu/drm/i915/intel_fb.c
> +++ b/drivers/gpu/drm/i915/intel_fb.c
> @@ -142,7 +142,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
>         info->fix.smem_len = size;
>
>         info->screen_base =
> -               ioremap_wc(dev_priv->mm.gtt_base_addr + obj->gtt_offset,
> +               ioremap_wc(dev_priv->gtt.mappable_base + obj->gtt_offset,
>                            size);
>         if (!info->screen_base) {
>                 ret = -ENOSPC;
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index fabe0ac..ba978bf 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -195,7 +195,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
>         if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
>                 regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_obj->handle->vaddr;
>         else
> -               regs = io_mapping_map_wc(dev_priv->mm.gtt_mapping,
> +               regs = io_mapping_map_wc(dev_priv->gtt.mappable,
>                                          overlay->reg_bo->gtt_offset);
>
>         return regs;
> @@ -1434,7 +1434,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
>                 regs = (struct overlay_registers __iomem *)
>                         overlay->reg_bo->phys_obj->handle->vaddr;
>         else
> -               regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
> +               regs = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
>                                                 overlay->reg_bo->gtt_offset);
>
>         return regs;
> --
> 1.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br


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