On Tue, 25 Sep 2012 10:49:28 +0200 Daniel Vetter <daniel at ffwll.ch> wrote: > On Wed, Sep 19, 2012 at 01:28:58PM -0700, Jesse Barnes wrote: > > Several platforms need this to flush the CS write buffers. > > Chris spent quite some effort to dump less crap into the rings on gen6, > and your description here sounds like we only need this when flushing > write caches. Or it might only apply to CS writes (in which case this is > at the wrong spot). In any case, can you please double check where exactly > we need this and only add it there, with a neat comment explaining things > added? "write caches" as in "any time we do a store dw and want to read the result coherently" is my understanding. > I'm bitching because afair the CS stuff the windows driver emits (of which > I've seen some traces) only emits one such 8x MI_WRITE block per batch, > whereas your code here would emit 2 such 2x MI_WRITE blocks. Doing it once should be sufficient, I guess I need to split this out (probably a good idea anyway for comment & naming purposes). -- Jesse Barnes, Intel Open Source Technology Center
