On Wed, 5 Sep 2012 21:24:39 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote: > The gmbus interrupt generation is rather fiddly: We can only ever > enable one interrupt source (but we always want to check for NAK > in addition to the real bit). And the bits in the gmbus status > register don't map at all to the bis in the irq register. > > To prepare for this mess, start by extracting the hw status wait > loop into it's own function, consolidate the NAK error handling a > bit. To keep things flexible, pass in the status bit we care about > (in addition to any NAK signalling). There are some subtle changes in that we introduce new error detection which is promptly ignored with a different wait period, but the changes look good. Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk> -- Chris Wilson, Intel Open Source Technology Centre
