Hi
2012/10/29 Damien Lespiau <damien.lespiau at gmail.com>:
> From: Damien Lespiau <damien.lespiau at intel.com>
>
> We were writing DSP_ADDR and DSP_SURF unconditionally. This did not
> trigger an unclaimed write before HSW as the address of DSP_ADDR has
> been repurposed as DSP_LINOFF.
>
> On HSW, though, DSP_LINOFF has been removed and then writting to it
> triggers an unclaimed write.
>
> This patch writes to DSP_ADDR or DSP_SURF to flush the display plane
> configuration depending on the gen we're running on.
>
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
Looks correct.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 6 ++++--
> 1 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a038e4f..f32244b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1836,8 +1836,10 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,
> void intel_flush_display_plane(struct drm_i915_private *dev_priv,
> enum plane plane)
> {
> - I915_WRITE(DSPADDR(plane), I915_READ(DSPADDR(plane)));
> - I915_WRITE(DSPSURF(plane), I915_READ(DSPSURF(plane)));
> + if (dev_priv->info->gen >= 4)
> + I915_WRITE(DSPSURF(plane), I915_READ(DSPSURF(plane)));
> + else
> + I915_WRITE(DSPADDR(plane), I915_READ(DSPADDR(plane)));
> }
>
> /**
> --
> 1.7.7.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
