Even though we do not use the EI mode for determining when to change GPU
frequencies for RPS, changing this value causes no up interrupts to be
generated whilst an OpenGL client runs.
Fixes regression from commit 1ee9ae3244c4789f3184c5123f3b2d7e405b3f4c
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Wed Aug 15 10:41:45 2012 +0200
drm/i915: use hsw rps tuning values everywhere on gen6+
Reported-by: Eric Anholt <eric at anholt.net>
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Eric Anholt <eric at anholt.net>
Cc: Ben Widawsky <ben at bwidawsk.net>
Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 81e88c2..15b585e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2493,7 +2493,7 @@ static void gen6_enable_rps(struct drm_device *dev)
I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
- I915_WRITE(GEN6_RP_UP_EI, 66000);
+ I915_WRITE(GEN6_RP_UP_EI, IS_HASWELL(dev) ? 66000 : 100000);
I915_WRITE(GEN6_RP_DOWN_EI, 350000);
I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
--
1.7.10.4
