On Fri, Oct 12, 2012 at 9:03 PM, Stuart Abercrombie <sabercrombie at chromium.org> wrote: >> My docs here say that the SDE_ISR reg contains what we want - high >> level irq bit when the hpd line is enabled. I admit, I haven't tested >> this ... > > I'm looking at 2.1.1 in this > http://intellinuxgraphics.org/documentation/SNB/IHD_OS_Vol3_Part3.pdf. > All it has relating to hotplug in SDEIIR are D, C and B versions of > this: > > "The ISR is an active high level representing the DIgital Port B > hotplug line when the Digital Port B hotplug detect input is enabled. > The unmasked IIR is set on either a short or long pulse detection > status in the Digital Port Hot Plug Control Register." > > The SHOTPLUG_CTL description in 2.1.6 says DP_B_HPD_Status "reflects > the hot plug detect status on the digital port B... When either a long > or short pulse is detected, one of these bits will set. These bits > are ORed together to go in the main ISR hotplug register bit." > > Based on this description, and observed behavior, it looks as if these > registers only tell you about pulses/interrupt sources, not the line > state. > > Am I missing something? I've tried to be slightly lazy than in my previous mail and quickly tested this on my snb here: Bit 23 in SDEISR (0xc4000) is set when the cable is plugged in, and cleared when nothing is plugged in. Afaict it works as advertised. Note tha the SDE irq definitions nicely differentiates between "active high pulse" type interrupts and "active high level" interrupts. The hpd irq sources are all of the level type. Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
