On Fri, Oct 12, 2012 at 8:40 PM, Stuart Abercrombie <sabercrombie at chromium.org> wrote: >> In the hotplug register, like on g4x. But that moved to to PCH_IIR on pch >> platforms. I plan to rework the entire hotplug handling for 3.8, hence why >> I haven't bothered to wire this up yet. > > You are saying that the HPD line state is available in the register > called SDEIIR in the code? The documentation only describes pulse > detection bits in this register, not anything directly reflecting the > line state. The same is true of PCH_PORT_HOTPLUG/SHOTPLUG_CTL. > > Testing did not show these registers, or others in the same range, > reflecting the HPD line state. > > Hence my question. My docs here say that the SDE_ISR reg contains what we want - high level irq bit when the hpd line is enabled. I admit, I haven't tested this ... -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
