[PATCH] drm/i915: flush system agent TLBs on SNB so we can WC map the PTEs

[jbarnes at virtuousgeek.org (Jesse Barnes)]

I've only lightly tested this so far, but the corruption seems to be
gone if I write the GFX_FLSH_CNTL reg after binding an object.  This
register should control the TLB for the system agent, which is what CPU
mapped objects will go through.

Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>

diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 6ec0fff..95f0d4d 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -99,6 +99,9 @@
 #define GFX_FLSH_CNTL		0x2170 /* 915+ */
 #define GFX_FLSH_CNTL_VLV	0x101008
 
+#define GFX_FLSH_CNTL		0x101008
+#define   GFX_FLSH_CNTL_EN	(1<<0)
+
 #define I810_DRAM_CTL		0x3000
 #define I810_DRAM_ROW_0		0x00000001
 #define I810_DRAM_ROW_0_SDRAM	0x00000001
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index e01f5ea..08844d6 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -667,12 +667,8 @@ static int intel_gtt_init(void)
 	gtt_map_size = intel_private.base.gtt_total_entries * 4;
 
 	intel_private.gtt = NULL;
-	if (INTEL_GTT_GEN < 6)
-		intel_private.gtt = ioremap_wc(intel_private.gtt_bus_addr,
-					       gtt_map_size);
-	if (intel_private.gtt == NULL)
-		intel_private.gtt = ioremap(intel_private.gtt_bus_addr,
-					    gtt_map_size);
+	intel_private.gtt = ioremap_wc(intel_private.gtt_bus_addr,
+				       gtt_map_size);
 	if (intel_private.gtt == NULL) {
 		intel_private.driver->cleanup();
 		iounmap(intel_private.registers);
@@ -897,6 +893,7 @@ void intel_gtt_insert_sg_entries(struct sg_table *st,
 		}
 	}
 	readl(intel_private.gtt+j-1);
+	writel(GFX_FLSH_CNTL_EN, intel_private.registers + GFX_FLSH_CNTL);
 }
 EXPORT_SYMBOL(intel_gtt_insert_sg_entries);
 
@@ -913,6 +910,7 @@ static void intel_gtt_insert_pages(unsigned int first_entry,
 						  j, flags);
 	}
 	readl(intel_private.gtt+j-1);
+	writel(GFX_FLSH_CNTL_EN, intel_private.registers + GFX_FLSH_CNTL);
 }
 
 static int intel_fake_agp_insert_entries(struct agp_memory *mem,
@@ -1256,7 +1254,7 @@ static int i9xx_setup(void)
 
 	reg_addr &= 0xfff80000;
 
-	if (INTEL_GTT_GEN >= 7)
+	if (INTEL_GTT_GEN >= 6)
 		size = MB(2);
 
 	intel_private.registers = ioremap(reg_addr, size);