Hi 2012/10/2 Ben Widawsky <ben at bwidawsk.net>: > On Tue, 2 Oct 2012 17:43:41 -0500 > Jesse Barnes <jbarnes at virtuousgeek.org> wrote: > >> Workaround for a culling optimization. >> >> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org> >> --- >> drivers/gpu/drm/i915/i915_reg.h | 1 + >> drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++ >> 2 files changed, 9 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h >> index c75539b..3ceeb68 100644 >> --- a/drivers/gpu/drm/i915/i915_reg.h >> +++ b/drivers/gpu/drm/i915/i915_reg.h >> @@ -521,6 +521,7 @@ >> */ >> # define _3D_CHICKEN2_WM_READ_PIPELINED (1 << 14) >> #define _3D_CHICKEN3 0x02090 >> +#define _3D_CHICKEN_SF_DISABLE_OBJEND_CULL (1 << 10) >> #define _3D_CHICKEN_SF_DISABLE_FASTCLIP_CULL (1 << 5) >> >> #define MI_MODE 0x0209c >> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c >> index 828629b..400dd05 100644 >> --- a/drivers/gpu/drm/i915/intel_pm.c >> +++ b/drivers/gpu/drm/i915/intel_pm.c >> @@ -3533,6 +3533,10 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) >> >> I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE); >> >> + /* WaDisableEarlyCull */ >> + I915_WRITE(_3D_CHICKEN3, >> + _MASKED_BIT_ENABLE(_3D_CHICKEN_SF_DISABLE_OBJEND_CULL)); >> + >> I915_WRITE(IVB_CHICKEN3, >> CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE | >> CHICKEN3_DGMG_DONE_FIX_DISABLE); >> @@ -3611,6 +3615,10 @@ static void valleyview_init_clock_gating(struct drm_device *dev) >> >> I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE); >> >> + /* WaDisableEarlyCull */ >> + I915_WRITE(_3D_CHICKEN3, >> + _MASKED_BIT_ENABLE(_3D_CHICKEN_SF_DISABLE_OBJEND_CULL)); >> + >> I915_WRITE(IVB_CHICKEN3, >> CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE | >> CHICKEN3_DGMG_DONE_FIX_DISABLE); > > FYI: We need this for pre-production HSW also (while we have to use > those platforms). At least on my docs this bit is listed for SNB and IVB only. After this patch I get a GPU hang every time I boot the HSW machine. Maybe we need this only for some specific pre-production machines, but not all? (in this case, our docs need to be fixed) > > Reviewed-by: Ben Widawsky <ben at bwidawsk.net> > > -- > Ben Widawsky, Intel Open Source Technology Center > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni
