[PATCH 10/12] drm/i915: TLB invalidation with MI_FLUSH_SW requires a post-sync op

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Subject: [PATCH 10/12] drm/i915: TLB invalidation with MI_FLUSH_SW requires a post-sync op
From: daniel at ffwll.ch (Daniel Vetter)
Date: Wed, 3 Oct 2012 09:20:20 +0200
In-reply-to: <20121002171453.3a201ac1@bwidawsk.net>
References: <1349217826-2538-1-git-send-email-jbarnes@virtuousgeek.org> <1349217826-2538-11-git-send-email-jbarnes@virtuousgeek.org> <20121002171453.3a201ac1@bwidawsk.net>

On Tue, Oct 02, 2012 at 05:14:53PM -0700, Ben Widawsky wrote:
> s/MI_FLUSH_SW/MI_FLUSH_DW/

Applied, with spelling fixed. Thanks for patch&review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

Follow-Ups:
- [PATCH 10/12] drm/i915: TLB invalidation with MI_FLUSH_SW requires a post-sync op
  - From: Daniel Vetter

References:
- Updated workaround & VLV fixes
  - From: Jesse Barnes
- [PATCH 10/12] drm/i915: TLB invalidation with MI_FLUSH_SW requires a post-sync op
  - From: Jesse Barnes
- [PATCH 10/12] drm/i915: TLB invalidation with MI_FLUSH_SW requires a post-sync op
  - From: Ben Widawsky

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